Memory device and operating method thereof

A method of a memory device which comprises a plurality of row decoder blocks distinguished based on row addresses which the plurality of row decoder blocks take charge of, the method comprising:

• based on the memory device being turned on, storing a first plurality of faulty row addresses in a plurality of repair control blocks, respectively;
• based on the memory device being turned on, determining locations of row decoder blocks corresponding to a second plurality of faulty row addresses among the first plurality of faulty row addresses;
• and
• generating a control signal for controlling an operation of the memory device based on the locations,
• wherein the second plurality of faulty row addresses comprises a third plurality of faulty row addresses stored in a given number of repair control blocks continuously disposed from one side of the plurality of repair control blocks.

A memory device comprising:

• a fuse array configured to store a faulty row address;
• a plurality of row decoder blocks respectively corresponding to a plurality of memory cell blocks;
• and
• a fuse tracking circuit configured to determine a location of a row decoder block corresponding to the faulty row address from among the plurality of row decoder blocks and to generate a control signal for controlling an operation of the memory device based on the location.