Decoding method and decoder device used in flash memory controller capable of reducing design complexity and circuit costs

A decoder device used in a flash memory controller, the flash memory controller being used to be coupled between a host device and a flash memory, and the decoder device comprises:

• a syndrome calculation check circuit, for calculating a syndrome value of a variable node Vi of a parity check matrix according to a plurality of bits of a received input data, the parity check matrix including N×M sub-matrices formed by multiple variable nodes V1−VN and multiple check nodes C1−CM, a value of i being in 1−N;
• a first barrel shifter, coupled to the syndrome calculation check circuit, for rotating the syndrome value of the variable node Vi into a vertical direction of a variable node Vi+1 to generate an estimated syndrome value of the variable node Vi+1;
• a second barrel shifter, coupled to the syndrome calculation check circuit, for rotating a syndrome value of a variable node Vi−1 into a vertical direction of a variable node Vi+Δ to generate information of a rotated syndrome value;
• a variable weighted-sum calculation circuit, coupled to the second barrel shifter, for determining a plurality of weight values based on information of a plurality of rotated syndrome values outputted by the second barrel shifter to perform a weighted-sum calculation upon the information of the plurality of rotated syndrome values to generate a flipping function value;
• and
• a flipping circuit, coupled to the variable weighted-sum calculation circuit, for comparing the flipping function value with a flipping threshold value to generate a flipping result;
• wherein the syndrome calculation check circuit determines whether to flip a specific bit of the plurality of bits according to the flipping result;
• when determining to flip the specific bit, the syndrome calculation check circuit calculates a syndrome value of the variable node Vi+1 based on the flipped specific bit;
• and, when determining not to flip the specific bit, the syndrome calculation check circuit uses the estimated syndrome value of the variable node Vi+1 generated by the first barrel shifter as the syndrome value of the variable node Vi+1.