Memory patching with associative and directly mapped patch data

An apparatus, comprising:

• a boot read-only memory, ROM;
• a one-time programmable, OTP, memory;
• a patch manager;
• and
• a ROM controller configured to:
• receive, from a bus controller, a request for first data stored at a first address in a first portion of an address map of the boot ROM;
• return to the bus controller, based on a determination by the patch manager that an associative record in a first region of the OTP memory includes an address that matches the first address, patch data of the associative record, the patch data including a jump instruction to a second address in a second portion of the address map of the boot ROM, the second portion of the address map being distinct from the first portion of the address map;
• receive, from the bus controller and based on the patch data, a request for second data stored at the second address in the second portion of the address map, the addresses in the second portion of the address map being directly mapped to records in a second region of the OTP memory;
• receive, from the patch manager, the second data from a directly mapped record in the second region of the OTP memory, the patch manager configured to access the directly mapped records in the second region of the OTP memory based on an offset between the start of the second portion of the address map and the second address, the offset based on a header record of the OTP memory that stores a value describing a quantity of associative records in the first region of the OTP memory;
• and
• return, to the bus controller, the second data of the directly mapped record in the second region of the OTP memory.

A non-transitory computer readable storage medium comprising computer-executable instructions that when executed by a computer will cause the computer to:

• receive, from a bus controller, a request for first data stored at a first address in a first portion of an address map of a boot ROM;
• determine, based on the first address, that an associative record in a first region of a one-time programmable, OTP, memory includes an address that matches the first address;
• return, to the bus controller, patch data of the associative record, the patch data including a jump instruction to a second address in a second portion of the address map of the boot ROM, the second portion of the address map being distinct from the first portion of the address map;
• receive, from the bus controller and based on the patch data, a request for second data stored at the second address in the second portion of the address map, the addresses in the second portion of the address map being directly mapped to records in a second region of the OTP memory;
• access, based on an offset between the start of the second portion of the address map and the second address, the second data of a directly mapped record in the second region of the OTP memory, the offset based on a header record of the OTP memory that stores a value describing a quantity of associative records in the first region of the OTP memory;
• and return, to the bus controller, the second data of the directly mapped record from the OTP memory.