Thin film transistor, manufacturing method for the same, and display substrate

A display substrate, comprising a Thin Film Transistor (TFT), wherein the TFT comprises:

• a base substrate;
• a gate electrode arranged on the base substrate;
• an active layer arranged at a side of the gate electrode away from the base substrate, an orthogonal projection of the active layer onto the base substrate overlapping with an orthogonal projection of the gate electrode onto the base substrate;
• and a source electrode and a drain electrode arranged at a side of the active layer away from the base substrate and coupled to the active layer, wherein a resistance between the gate electrode and the drain electrode is greater than a resistance between the gate electrode and the source electrode,
• wherein the orthogonal projection of the gate electrode onto the base substrate does not overlap with an orthogonal projection of the drain electrode onto the base substrate, and the orthogonal projection of the gate electrode onto the base substrate overlaps with an orthogonal projection of the source electrode onto the base substrate;
• where in the TFT further comprises an additional gate electrode;
• and
• wherein a minimum distance between a first boundary of the additional gate electrode close to the source electrode and a second boundary of the drain electrode close to the source electrode is a1 in a direction parallel to the base substrate, a1 is greater than 0 and smaller than L, and L is a length of a channel of the TFT.

A method for manufacturing a TFT, comprising:

• providing a base substrate;
• forming a gate electrode on the base substrate;
• forming an active layer at a side of the gate electrode away from the base substrate, an orthogonal projection of the active layer onto the base substrate overlapping with an orthogonal projection of the gate electrode onto the base substrate;
• and forming a source electrode and a drain electrode at a side of the active layer away from the base substrate, the source electrode and the drain electrode being coupled to the active layer, wherein a resistance between the gate electrode and the drain electrode is greater than a resistance between the gate electrode and the source electrode,
• wherein the orthogonal projection of the gate electrode onto the base substrate does not overlap with an orthogonal projection of the drain electrode onto the base substrate, and the orthogonal projection of the gate electrode onto the base substrate overlaps with an orthogonal projection of the source electrode onto the base substrate;
• where in the TFT further comprises an additional gate electrode;
• and
• where in a minimum distance between a first boundary of the additional gate electrode close to the source electrode and a second boundary of the drain electrode close to the source electrode is a1 in a direction parallel to the base substrate, a1 is greater than 0 and smaller than L, and L is a length of a channel of the TFT.