Image sensor circuit
AssigneeSharp Semiconductor Innovation Corporation
InventorsYoshinao Morikawa, Takeo Ushinaga
Life of this patent
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Abstract
An image sensor circuit includes a plurality of column analog/digital conversion circuits each including: first to n-th storage elements configured to respectively store first to n-th pieces of bit data that constitute analog/digital-converted data obtained by analog/digital-converting analog signals outputted by pixels, where n is an integer greater than or equal to 2; first to (n−1)-th transfer paths configured to respectively transfer the bit data stored in the first to (n−1)-th storage elements from the first to (n−1)-th storage elements to the second to n-th storage elements; and an n-th transfer path configured to transfer the bit data stored in the n-th storage element from the n-th storage element to outside the plurality of column analog/digital conversion circuits.
Claims10
An image sensor circuit comprising a plurality of column analog/digital conversion circuits, each comprising:
- first to n-th storage elements configured to store, respectively, first to n-th pieces of bit data that form analog/digital-converted data obtained by analog/digital-converting analog signals outputted by pixels, where n is an integer greater than or equal to 2;
- first to (n−1)-th transfer paths configured to respectively transfer first to (n−1)-th pieces of bit data stored in first to (n−1)-th storage elements from the first to (n−1)-th storage elements to second to n-th storage elements;
- and
- an n-th transfer path configured to transfer the n-th piece of bit data stored in the n-th storage element from the n-th storage element to outside the plurality of column analog/digital conversion circuits,
- wherein each of the first to n-th storage elements includes a first inverter and a second inverter, and
- among the first to n-th storage elements, a first storage element and a second storage element that are adjacent to each other are connected, such that the second inverter of the first storage element and the first inverter of the second storage element are connected in parallel.
Dependencies are inferred from the claim text.