US 12,659,613 B2 · Interleaving switch cap integrator DAC for low noise ramp generation with lower AVDD power supply

Abstract

Disclosure relates to interleaving switch cap integrator DAC for low noise ramp generation with lower AVDD power supply. Embodiments of interleaving switch cap integrator digital-to-analog converter (DAC) for low noise ramp generation while operating with low power supply voltage are described. In one embodiment, an image sensor includes: a plurality of pixels arranged in rows and columns of a pixel array; a bitline electrically coupled to an active pixel; and a switched capacitor current digital to analog converter (IDAC) coupled to the bitline. The IDAC includes a plurality of switch banks, where each switch bank is configured to receive a control signal for controlling opening and closing of switches of the switch bank. The control signals are offset in time. An integrator is coupled to the plurality of switch banks. The integrator is configured for generating an output signal based on input signals received from the plurality of switch banks.

Claims19

Dependent claims

An image sensor, comprising:

a plurality of pixels arranged in rows and columns of a pixel array;
a bitline electrically coupled to a pixel;
and
a switched capacitor current digital to analog converter (IDAC) coupled to the bitline, the IDAC comprising:
a plurality of switch banks, each switch bank configured to receive a control signal for controlling opening and closing of switches of the switch bank, wherein control signals are offset in time;
and
an integrator coupled to the plurality of switch banks, wherein the integrator is configured for generating an output signal based on input signals received from the plurality of switch banks,
wherein a time offset between the control signals for two switch banks of the plurality of switch banks satisfies:
Δ
⁢
T
=
T
/
N
,
where T is a period of the control signal, and N is a number of switch banks of the plurality of switch banks.

14 more elements

Dependencies are inferred from the claim text.

Interleaving switch cap integrator DAC for low noise ramp generation with lower AVDD power supply

Life of this patent

Interleaving switch cap integrator DAC for low noise ramp generation with lower AVDD power supply

Life of this patent

Abstract

Claims19