Hardware integrity control of an electronic device

A hardware integrity device for providing hardware integrity control of an electronic device, the hardware integrity device comprising:

• a hardware verification device;
• a processor;
• and
• a memory storing instructions that, when executed by the processor, cause the hardware integrity device to:
• trigger each one of a plurality of hardware components of the electronic device to generate respective partial secret keys for each of a plurality of threshold cryptography schemes with different security levels, wherein each threshold cryptography scheme is associated with a public key and a threshold number of the respective partial secret keys corresponding to the threshold cryptography scheme are required to be applied in the threshold cryptography scheme for verification against the public key;
• detect that the electronic device is in process of establishing access to a computer network;
• select one of the plurality of threshold cryptography schemes based on an identity of the computer network;
• coordinate, with the plurality of hardware components, the application of partial secret keys by the respective hardware components based on the selected threshold cryptography scheme, for verification by the hardware verification device, wherein the coordinating comprises:
• receiving an integrity indicator, being a set of data for indicating hardware integrity, from the hardware verification device, and
• communicating with the electronic device for at least the threshold number of hardware components of the electronic device applying respective signatures to the integrity indicator using their respective partial secret keys;
• and
• verify that the selected threshold cryptography scheme is satisfied.

A non-transitory computer readable medium storing a computer program for providing hardware integrity control of an electronic device, the computer program comprising computer program code which, when executed on a hardware integrity device comprising a hardware verification device, causes the hardware integrity device to:

• trigger each one of a plurality of hardware components of the electronic device to generate respective partial secret keys for each of a plurality of threshold cryptography schemes with different security levels, wherein each threshold cryptography scheme is associated with a public key and a threshold number of the plurality of partial secret keys are required to be applied in the threshold cryptography scheme for verification against the public key;
• detect that the electronic device is in process of establishing access to a computer network;
• select one of the plurality of threshold cryptography schemes based on an identity of the computer network;
• coordinate, with the plurality of hardware components, the application of partial secret keys by the respective hardware components based on the selected threshold cryptography scheme, for verification by the hardware verification device, wherein the coordinating comprises:
• receiving an integrity indicator, being a set of data for indicating hardware integrity, from the hardware verification device, and
• communicating with the electronic device for at least the threshold number of hardware components of the electronic device applying respective signatures to the integrity indicator using their respective partial secret keys;
• and
• verify that the selected threshold cryptography scheme is satisfied.