Device and method for synchronizing a data input signal and a clock input signal

A device comprising:

• a receiving circuit including a receiver configured to receive a data input signal and to generate a clock input signal and a first data output signal, wherein the receiver includes a delay line configured to receive a control input signal and to introduce a propagation delay to the data input signal by an amount that varies with the control input signal and that matches a propagation delay of the clock input signal;
• a processing circuit configured to process the first data output signal and to generate a second data output signal;
• and
• a transmitting circuit configured to transmit the second data output signal to a data signal-receiving device.

A method for synchronizing a data input signal and a clock input signal, the method comprising:

• receiving the data input signal and the clock input signal;
• introducing, by a first delay line, a first propagation delay to the data input signal by a predetermined amount;
• fine tuning, by a second delay line, the first propagation delay;
• after introducing and fine tuning the first propagation delay, generating a first data output signal based on the data input signal;
• processing, by a processing circuit, the first data output signal and generating a second data output signal;
• and
• transmitting the second data output signal to a data signal-receiving device.