Efficient phase encoding for clock recovery
AssigneeCadence Design Systems, Inc.
InventorsSatya Someswara Kaushik Yanamandra, Benjamin L. Heilmann, Douglas Scott Shelton
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AssigneeCadence Design Systems, Inc.
InventorsSatya Someswara Kaushik Yanamandra, Benjamin L. Heilmann, Douglas Scott Shelton
Estimating the term…
Phase interpolation techniques for clock and data recovery in high-speed serial interfaces. A phase interpolator interpolates between four input clock signals phase-offset by 90 degrees to generate eight output clock signals phase-offset by 45 degrees. The phase interpolator includes primary and secondary mixers that adjust phase values using a mixed thermometer-binary encoding scheme. The primary mixers use most-significant-bit (MSB) thermometer bits for coarse steps and least-significant-bit (LSB) thermometer and binary bits for fine half-steps. The secondary mixers additionally employ boundary bits to maintain proper phase relationships across quadrant transitions. The encoding scheme can reduce routing complexity while preserving monotonic phase progression over the full 360-degree range.
A method for controlling a phase interpolator to interpolate input clock signals, the method comprising:
A phase interpolator for interpolating four input clock signals phase-offset by 90 degrees to span 360 degrees, the phase interpolator comprising:
A method for controlling a phase interpolator to interpolate four input clock signals to generate eight output clock signals, the four input clock signals being phase-offset from each other by increments of 90 degrees to span 360 degrees, each of the eight output clock signals being phase-offset from each other by increments of 45 degrees to span 360 degrees, the phase interpolator comprising two primary mixers and two secondary mixers, the method comprising:
Dependencies are inferred from the claim text.