HVIC device with combined level shifter and boost diode in junction termination region

A power device, comprising:

• a) a semiconductor substrate composition having a substrate layer of a first conductivity type wherein the first conductivity type is opposite a second conductivity type;
• b) two or more lateral double diffused metal oxide semiconductor (LDMOS) devices formed in the substrate layer and integrated into an isolation region of a high voltage well, wherein each LDMOS device of the two or more LDMOS devices is isolated from a power device substrate area by an isolator structure formed from the substrate layer;
• and
• c) one or more boost structures integrated into the isolation region of the high voltage well wherein the one or more boost structures are in contact with the high voltage well and extend into the isolation region of the high voltage well;
• and d) a plurality of conductive electrically floating rings formed on top an insulation layer, wherein the plurality of conductive electrically floating rings are continuous over the isolator structure and the power device substrate area.