Memory systems and devices having enhanced column repair capability and methods of operating same
AssigneeSamsung Electronics Co., Ltd.
InventorsWon Hui Park, Ki-Ho Hyun
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AssigneeSamsung Electronics Co., Ltd.
InventorsWon Hui Park, Ki-Ho Hyun
Estimating the term…
A memory device includes a memory cell array having a plurality of normal memory cells and a plurality of redundant memory cells therein, a fuse array configured to store an address and a master bit of a defective first memory cell therein, and a column decoder configured to select among a plurality of column select lines associated with the normal memory cells and a plurality of spare column select lines associated with the redundant memory cells. The column decoder has a first column repair circuit therein, which includes: (i) a first latch array having a plurality of latch elements therein, which are configured to store a column address of the defective first memory cell, and (ii) first compare logic configured to compare outputs of the plurality of latch elements with an external column address, and generate a first enable signal that indicates whether or not to repair the defective first memory cell, in response to said compare.
A memory device, comprising:
A method for operating a memory device, comprising:
A memory system, comprising:
Dependencies are inferred from the claim text.