Memory device for in-memory computing

A memory device, comprising:

• a plurality of computing memory cells, each of the computing memory cells stores a weight value, receives a first input value and a second input value and generates an output value, and each of the computing memory cells comprising:
• a first set of switch elements, being turned-on or turned-off in response to a first input signal and a second input signal;
• a first resistor, connected to the first set of switch elements in series, the first resistor selectively receives a sensing current through the first set of switch elements;
• a second set of switch elements, being turned-on or turned-off in response to a third input signal and a fourth input signal;
• a second resistor, connected to the second set of switch elements in series, the second resistor selectively receives the sensing current through the second set of switch elements;
• a third set of switch elements, being turned-on or turned-off in response to the first input signal and the fourth input signal;
• a third resistor, connected to the third set of switch elements in series, the third resistor selectively receives the sensing current through the third set of switch elements;
• a fourth set of switch elements, being turned-on or turned-off in response to the third input signal and the second input signal;
• and
• a fourth resistor, connected to the fourth set of switch elements in series, the fourth resistor selectively receives the sensing current through the fourth set of switch elements;
• wherein, the first input signal and the third input signal are related to the first input value, the second input signal and the fourth input signal are related to the second input value, when the sensing current flows through the first resistor, the second resistor, the third resistor or the fourth resistor, the computing memory cell generates at least a first voltage difference or a second voltage difference, the first voltage difference and the second voltage difference correspond to the output value, the output value is equal to a result of a logical operation of the first input value and the second input value.

A memory device, comprising:

• a plurality of computing memory cells, each of the computing memory cells stores a weight value, receives an input value and generates an output value, and each of the computing memory cells comprising:
• a multiplexer, for receiving a sensing current and a plurality of input signals, the input signals are related to the input value;
• and
• a plurality of resistors, connected to the multiplexer, the resistors selectively receive the sensing current through the multiplexer in response to the input signals;
• wherein, when the sensing current flows through one of the resistors, the computing memory cell generates at least a first voltage difference or a second voltage difference, the first voltage difference and the second voltage difference correspond to the output value, and the output value is equal to a product of the input value and the weight value.