Least significant bit (LSB) information preserved signal interpolation with low bit resolution processors
AssigneeSamsung Electronics Co., Ltd.
InventorsHunsop Hong, Seongnam Oh
Life of this patent
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Abstract
One embodiment provides a computer-implemented method that includes receiving content having a first resolution. The processor splits the content into most significant bits and least significant bits. The processor further performs processing of the most significant bits of the content while preserving the least significant bits. The processor additionally performs a linear combination of outputs of the processing of the most significant bits with the preserved least significant bits for improving quality of the content.
Claims20
A computer-implemented method, comprising:
- receiving content having a first resolution;
- splitting, by a processor, the content into most significant bits and least significant bits;
- performing, by the processor, processing of the most significant bits of the content while preserving the least significant bits, wherein the processing of the most significant bits includes parallel processing a first version of the most significant bits and a second version of the most significant bits including an additional added bit;
- and
- performing, by the processor, a linear combination of outputs of the processing of the most significant bits with the preserved least significant bits for improving quality of the content.
A non-transitory processor-readable medium that includes a program that when executed by a processor performs improving picture quality of a display, comprising:
- receiving content having a first resolution;
- splitting, by the processor, the content into most significant bits and least significant bits;
- performing, by the processor, processing of the most significant bits of the content while preserving the least significant bits, wherein the processing of the most significant bits includes parallel processing a first version of the most significant bits and a second version of the most significant bits including an additional added bit;
- and
- performing, by the processor, a linear combination of outputs of the processing of the most significant bits with the preserved least significant bits for improving quality of the content.
An apparatus comprising:
- a memory storing instructions;
- and
- at least one processor executes the instructions including a process configured to:
- receive content having a first resolution;
- split the content into most significant bits and least significant bits;
- perform processing of the most significant bits of the content while preserving the least significant bits, wherein the processing of the most significant bits includes parallel processing a first version of the most significant bits and a second version of the most significant bits including an additional added bit;
- and
- perform a linear combination of outputs of the processing of the most significant bits with the preserved least significant bits for improving quality of the content.
Dependencies are inferred from the claim text.