Cached instruction recording for prediction embedding

A method, comprising:

• predicting, using a bias prediction circuit of a processor, respective conditions for individual conditional instructions according to one or more previous executions of the individual conditional instructions, wherein the predicted conditions individually comprise a biased condition or an unbiased condition, and wherein the biased condition indicates that a respective condition of the respective conditions is always true or always false;
• generating, by the bias prediction circuit, a prediction of the biased condition for a first conditional instruction;
• and
• encoding, in a cache of the processor using a fetch and decode circuit of the processor, information identifying the first conditional instruction as biased responsive to a prediction of a biased condition by the bias prediction circuit for the first conditional instruction.

A system, comprising:

• one or more processors individually comprising:
• a bias prediction circuit configured to predict respective conditions for individual conditional instructions according to one or more previous executions of the individual conditional instructions, wherein the predicted conditions individually comprise a biased condition or an unbiased condition, and wherein the biased condition indicates that a respective condition is always true or always false;
• and
• a fetch and decode circuit configured to encode, in a cache, information identifying a first conditional instruction as biased responsive to a prediction of a biased condition by the bias prediction circuit for the first conditional instruction.