US 12,657,004 B2 · Complex multiplication circuit

Abstract

A first multiplex circuit generates a first multiplex signal obtained by time-divisionally multiplexing a first real part and a first imaginary part of a first complex number. A second multiplex circuit generates a second multiplex signal obtained by time-divisionally multiplexing a second real part and a second imaginary part of a second complex number. A multiply-subtract operation circuit performs a multiply-subtract operation of the first and second multiplex signals. A third multiplex circuit generates a third multiplex signal obtained by time-divisionally multiplexing the first and second real parts. A fourth multiplex circuit generates a fourth multiplex signal obtained by time-divisionally multiplexing the first and second imaginary parts. A multiply-accumulate operation circuit performs a multiply-accumulate operation of the third and fourth multiplex signals. A fifth multiplex circuit generates a fifth multiplex signal obtained by time-divisionally multiplexing output values of the multiply-subtract operation circuit and the multiply-accumulate operation circuit.

Claims10

Dependent claims

A complex multiplication circuit to multiply a first complex number and a second complex number,

the first complex number having a first real part and a first imaginary part,
the second complex number having a second real part and a second imaginary part,
the complex multiplication circuit comprising:
a first multiplex circuit to generate a first multiplex signal obtained by time-divisionally multiplexing the first real part and the first imaginary part;
a second multiplex circuit to generate a second multiplex signal obtained by time-divisionally multiplexing the second real part and the second imaginary part;
a multiply-subtract operation circuit to perform a multiply-subtract operation of the first multiplex signal and the second multiplex signal;
a third multiplex circuit to generate a third multiplex signal obtained by time-divisionally multiplexing the first real part and the second real part;
a fourth multiplex circuit to generate a fourth multiplex signal obtained by time-divisionally multiplexing the second imaginary part and the first imaginary part;
a multiply-accumulate operation circuit to perform a multiply-accumulate operation of the third multiplex signal and the fourth multiplex signal;
and
a fifth multiplex circuit to generate a fifth multiplex signal obtained by time-divisionally multiplexing an output value of the multiply-subtract operation circuit and an output value of the multiply-accumulate operation circuit.

8 more elements

A complex multiplication circuit to selectively perform an operation of multiplying a first complex number and a second complex number and an operation of multiplying a complex conjugate of the first complex number and the second complex number in accordance with a control signal,

the first complex number having a first real part and a first imaginary part,
the second complex number having a second real part and a second imaginary part,
the complex multiplication circuit comprising:
a first multiplex circuit to generate a first multiplex signal obtained by time-divisionally multiplexing the first real part and the first imaginary part;
a second multiplex circuit to generate a second multiplex signal obtained by time-divisionally multiplexing the second real part and the second imaginary part;
a multiply-subtract and multiply-accumulate operation circuit to perform a multiply-subtract operation of the first multiplex signal and the second multiplex signal when the control signal is at a first level and to perform a multiply-accumulate operation of the first multiplex signal and the second multiplex signal when the control signal is at a second level;
a third multiplex circuit to generate a third multiplex signal obtained by time-divisionally multiplexing the first real part and the second real part;
a fourth multiplex circuit to generate a fourth multiplex signal obtained by time-divisionally multiplexing the second imaginary part and the first imaginary part;
a multiply-accumulate and multiply-subtract operation circuit to perform a multiply-accumulate operation of the third multiplex signal and the fourth multiplex signal when the control signal is at the first level and to perform a multiply-subtract operation of the third multiplex signal and the fourth multiplex signal when the control signal is at the second level;
and
a fifth multiplex circuit to generate a fifth multiplex signal obtained by time-divisionally multiplexing an output value of the multiply-subtract and multiply-accumulate operation circuit and an output value of the multiply-accumulate and multiply-subtract operation circuit.

8 more elements

Dependencies are inferred from the claim text.

Complex multiplication circuit

Life of this patent

Complex multiplication circuit

Life of this patent

Abstract

Claims10