Semiconductor device
AssigneeSK hynix Inc.
InventorsJeong Hwan Song, Tae Jung Ha
Life of this patent
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Abstract
A semiconductor device may include: a plurality of first conductive lines extending in a first direction; a plurality of second conductive lines spaced apart from the first conductive lines and extending in a second direction intersecting the first direction; and a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of the first conductive lines and the plurality of the second conductive lines; and a layer structured to include an insulating material containing metal ions and formed between each memory cell and at least one of a first conductive line and a second conductive line that intersects with each other at a memory cell.
Claims18
A semiconductor device, comprising:
- a plurality of first conductive lines extending in a first direction;
- a plurality of second conductive lines spaced apart from the plurality of first conductive lines and extending in a second direction intersecting the first direction;
- a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of first conductive lines and the plurality of second conductive lines;
- a layer structured to include an insulating material containing metal ions and formed between each of the plurality of memory cells and each of the plurality of first conductive lines or between each of the plurality of memory cells and each of the plurality of second conductive lines, wherein a width of the layer is smaller than a width of a memory cell of the plurality of memory cells;
- and
- an insulating layer surrounding a sidewall of the layer and formed between each of the plurality of memory cells and each of the plurality of first conductive lines or between each of the plurality of memory cells and each of the plurality of second conductive lines so as not to surround a sidewall of each of the plurality of memory cells.
A semiconductor device, comprising:
- a plurality of first conductive lines extending in a first direction;
- a plurality of second conductive lines spaced apart from the plurality of first conductive lines and extending in a second direction intersecting the first direction;
- a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of first conductive lines and the plurality of second conductive lines;
- a layer structured to include an insulating material containing metal ions and formed between each of the plurality of memory cells and each of the plurality of first conductive lines or between each of the plurality of memory cells and each of the plurality of second conductive lines;
- and
- a diffusion barrier layer interposed between the layer and a memory cell of the plurality of memory cells and configured to prevent or reduce diffusion of the metal ions of the layer into the memory cell.
A semiconductor device, comprising:
- a plurality of first conductive lines extending in a first direction;
- a plurality of second conductive lines spaced apart from the plurality of first conductive lines and extending in a second direction intersecting the first direction;
- a plurality of memory cells respectively disposed to overlap intersection regions of the plurality of first conductive lines and the plurality of second conductive lines;
- and
- a layer structured to include an insulating material containing metal ions and formed between each of the plurality of memory cells and each of the plurality of first conductive lines or between each of the plurality of memory cells and each of the plurality of second conductive lines,
- wherein the layer is structured to exhibit a first state in which current flows by the metal ions, or a second state in which an insulating portion is formed by movement of the metal ions, according to a voltage or a current supplied through a first conductive line of the plurality of first conductive lines and a second conductive line of the plurality of second conductive lines, and wherein the layer has the second state in response to the voltage or the current that has a width greater than a width of a pulse of an operating voltage or current of a memory cell of the plurality of memory cells.
Dependencies are inferred from the claim text.