# US 12,652,110 B2 · Optical interconnects for a programmable virtualized self-optimizing signal processor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,652,110 B2 - Document ID: US12652110B2 - Status: Granted - Kind: B2 - Application number: 18/033,157 - Filed: 2021-09-30 - Published: 2023-12-21 - Granted: 2026-06-09 - Earliest claimed: 2020-10-21 - Assignees: Ciena Corporation - Applicants: Ciena Corporation - Inventors: Michael Y. Frankel; Stephen B. Alexander - Web page: https://patentgrep.com/patent/US12652110B2 ## CPC - H04B 10/572: Wavelength control - H04B 10/801: {using optical interconnects, e.g. light coupled isolators, circuit board interconnections} - H04B 10/40: Transceivers - H04B 10/541: {Digital intensity or amplitude modulation} - H04B 10/5162: {Return-to-zero modulation schemes} - H04B 10/548: Phase or frequency modulation - H04B: TRANSMISSION ## Abstract An electrical circuit package includes an electrical processing engine (10) circuit configured to perform data processing; and one or more co-packaged coherent optical Input/Output (IO) modules (20) interconnected to the electrical processing engine (10) circuit, wherein the electrical processing engine (10) circuit is configured to interface electrical data including an optical signal waveform representation to each of the one or more co-packaged coherent optical IO modules, and wherein the one or more co-packaged coherent optical IO modules (20) are configured to coherently transmit and receive optical data based on the optical signal waveform representation. The electrical processing engine (10) circuit can be configured to perform optical modulation and demodulation based on the optical signal waveform representation, in addition to the data processing. ## Claims ### Claim 1 An optical interconnect circuit comprising: a processing circuit having a processing capability that is used to perform data processing functions; and one or more coherent optical Input/Output (IO) modules connected to and co-packaged with the processing circuit, wherein each of the one or more coherent optical IO modules is configured to exchange, with the processing circuit, a digitized electrical waveform representation of an optical signal over an electrical interface, and wherein the processing circuit is further configured to perform coherent optical modulation and demodulation in an electrical domain on the digitized waveform representation for the one or more coherent optical IO modules, wherein the processing circuit is further configured to perform one or more of (i) transmitter-side constellation shaping in the electrical domain on the digitized waveform representation for transmission via the one or more coherent optical IO modules, or (ii) receiver-side equalization and decoding in the electrical domain on the digitized waveform representation received from the one or more coherent optical IO modules. ### Claim 2 (depends on 1) The optical interconnect circuit of claim 1, wherein the processing circuit is configured to provide a digitized electrical baseband waveform representation of an optical signal to each of the one or more coherent optical IO modules. ### Claim 3 (depends on 1) The optical interconnect circuit of claim 1, wherein the processing circuit is one of an Application-Specific Integrated Circuit (ASICs), a Field Programmable Gate Arrays (FPGA), a Graphics Processing Unit (GPU), a Central Processing Unit (CPU), and a Tensor Processing Unit (TPU). ### Claim 4 (depends on 1) The optical interconnect circuit of claim 1, wherein the data processing functions include any of switching, routing, multicasting, and load balancing. ### Claim 5 (depends on 1) The optical interconnect circuit of claim 1, wherein the data processing functions include manipulation of framing and payload data. ### Claim 6 (depends on 1) The optical interconnect circuit of claim 1, wherein the processing circuit is virtualized separating the data processing functions and the coherent optical modulation and demodulation. ### Claim 7 (depends on 1) The optical interconnect circuit of claim 1, wherein the one or more coherent optical IO modules are co-packaged with the processing circuit via an interposer. ### Claim 8 (depends on 1) The optical interconnect circuit of claim 1, wherein the one or more coherent optical IO modules are co-packaged with the processing circuit via flip-chipped onto one another. ### Claim 9 A method of operating a processing circuit comprising: performing data processing functions via a processing capability in the processing circuit; and exchanging, with one or more coherent optical Input/Output (IO) modules connected to and co-packaged with the processing circuit, a digitized electrical waveform representation of an optical signal over an electrical interface, and performing coherent optical modulation and demodulation in an electrical domain on the digitized waveform representation via some of the processing capability, wherein the processing circuit is further configured to perform one or more of (i) transmitter-side constellation shaping in the electrical domain on of the digitized waveform representation for transmission via the one or more coherent optical IO modules, or (ii) receiver-side equalization and decoding in the electrical domain on the digitized waveform representation received from the one or more coherent optical IO modules. ### Claim 10 (depends on 9) The method of claim 9, wherein the processing circuit is configured to provide a digitized electrical baseband waveform representation of an optical signal to each of the one or more coherent optical IO modules. ### Claim 11 (depends on 9) The method of claim 9, wherein the processing circuit is one of an Application-Specific Integrated Circuit (ASICs), a Field Programmable Gate Arrays (FPGA), a Graphics Processing Unit (GPU), a Central Processing Unit (CPU), and a Tensor Processing Unit (TPU). ### Claim 12 (depends on 9) The method of claim 9, wherein the data processing functions include any of switching, routing, multicasting, and load balancing. ### Claim 13 (depends on 9) The method of claim 9, wherein the data processing functions include manipulation of framing and payload data. ### Claim 14 (depends on 9) The method of claim 9, wherein the processing circuit is virtualized separating the data processing functions and the coherent optical modulation and demodulation. ### Claim 15 (depends on 9) The method of claim 9, wherein the one or more coherent optical IO modules are co-packaged with the processing circuit via an interposer. ### Claim 16 (depends on 9) The method of claim 9, wherein the one or more coherent optical IO modules are co-packaged with the processing circuit via flip-chip onto one another.