Method and apparatus for processing input variables

A method for processing input variables, comprising the following steps:

• applying a first input variable to a control electrode of a first transistor;
• applying a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable;
• encoding a magnitude of a ternary variable using at least the first transistor and/or the first input variable;
• and
• encoding a sign of the ternary variable using the second input variable.

An apparatus configured to process input variables, the apparatus configured to:

• apply a first input variable to a control electrode of a first transistor;
• and
• apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and
• wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

An apparatus configured to process input variables, the apparatus configured to:

• apply a first input variable to a control electrode of a first transistor;
• and
• apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable,
• wherein a second transistor is provided, wherein the first input variable can be applied to control electrodes of the first transistor and of the second transistor, and wherein the control electrodes of the first transistor and of the second transistor are connected to one another,
• wherein a) a first terminal of a load path of the first transistor is connected to a first terminal of the current leakage device, and/or b) a second terminal of a load path of the first transistor is connected to a first reference potential, and/or c) a first terminal of a load path of the second transistor is connected to a second terminal of the current leakage device, and/or d) a second terminal of a load path of the second transistor is connected to the first reference potential,
• wherein the current leakage device includes a first transistor, wherein the first terminal of the current leakage device can be selectively connected to the second circuit node by the first transistor based on the second input variable, wherein the current leakage device has a second transistor, wherein the first terminal of the current leakage device can be selectively connected to the first circuit node by the second transistor based on the second input variable, and
• wherein the current leakage device has a third transistor, wherein the second terminal of the current leakage device can be selectively connected to the second circuit node by the third transistor based on the second input variable, wherein the current leakage device has a fourth transistor, wherein the second terminal of the current leakage device can be selectively connected to the first circuit node by the fourth transistor based on the second input variable.

A computing device, comprising:

• an apparatus configured to process input variables, the apparatus configured to:
• apply a first input variable to a control electrode of a first transistor;
• and
• apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and
• wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

A non-transitory computer-readable storage medium on which are stored commands for processing input variables, the commands, when executed by a computer, causing the computer to perform the following steps:

• applying a first input variable to a control electrode of a first transistor;
• and
• applying a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and
• wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

An apparatus configured to process input variables, the apparatus configured to:

• apply a first input variable to a control electrode of a first transistor;
• and
• apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and
• wherein the apparatus is used for:
• a) encoding ternary values including weights, b) providing a circuit for carrying out binary or ternary multiplication and/or accumulation operations, c) use of transistors for carrying out ternary multiplication and/or accumulation operations, d) hardware-based acceleration of an inference of a ternary artificial neural network.