Bandwidth adjustment circuit and bandwidth adjustment method of operational amplifier

A bandwidth adjustment method of an operational amplifier, comprising:

• providing a bias current to the operational amplifier based on a current source;
• adjusting the bias current according to an output voltage of the operational amplifier, so as to realize bandwidth adjustment on the operational amplifier,
• wherein adjusting the bias current according to an output voltage of the operational amplifier comprises:
• adjusting a first current flowing through an adjusting transistor according to the output voltage of the operational amplifier, wherein the adjusting transistor is serially connected between an output terminal of the operational amplifier for providing the output voltage and a power supply terminal;
• and
• adjust the bias current by shunting a current flow off from the bias current, wherein the current flow is adjusted in accordance with the first current flowing through the adjusting transistor.

A bandwidth adjustment circuit of an operational amplifier, comprising:

• a bias current generation unit, which is connected to a bias current input terminal of the operational amplifier and used for supplying a bias current to the operational amplifier;
• a current adjustment unit, which is connected to the bias current generation unit and an output terminal of the operational amplifier, respectively, and used for adjusting the bias current according to an output voltage of the operational amplifier to realize bandwidth adjustment on the operational amplifier,
• wherein the current adjustment unit comprises:
• a third transistor and a fourth transistor forming a current mirror structure, wherein a drain of the third transistor is connected to the bias current input terminal of the operational amplifier, a gate of the third transistor is connected to both of a gate and a drain of the fourth transistor, and a source of the third transistor and a source of the fourth transistor is connected to a reference ground;
• a fifth transistor, which has a drain connected to a power supply terminal through a second current source, and has a source connected to the reference ground;
• a sixth transistor, which has a gate connected to both of a gate and the drain of the fifth transistor and has a source connected to the output terminal of the operational amplifier;
• a seventh transistor and an eighth transistor forming a current mirror structure, wherein a source of the seventh transistor and a source of the eighth transistor are both connected to the power supply terminal, a gate electrode of the seventh transistor is connected to both of a gate and a drain electrode of the eighth transistor, a drain of the seventh transistor is connected to the drain electrode of the fourth transistor, and a drain of the eighth transistor is connected to a drain electrode of the sixth transistor.