Semiconductor apparatus with active internal power control and memory system including the same
AssigneeSK hynix Inc.
InventorHyun Chul Cho
Life of this patent
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Abstract
A semiconductor apparatus includes an internal voltage generation circuit and a control circuit. The internal voltage generation circuit includes a plurality of sub-circuits that receive an external voltage as an input and generate at least one internal voltage based on the external voltage. The control circuit determines where the external voltage falls within a range between a minimum operating voltage and a target operating voltage according to power information and a built-in lookup table and controls the plurality of sub-circuits according to a result of the determination.
Claims16
A semiconductor apparatus comprising:
- an internal voltage generation circuit including a plurality of sub-circuits configured to receive an external voltage as an input and configured to generate at least one internal voltage based on the external voltage;
- a control circuit configured to determine where the external voltage falls within a range between a minimum operating voltage and a target operating voltage referring to values stored in a built-in lookup table according to power information and configured to control the plurality of sub-circuits according to a result of the determination;
- and
- a command decoder configured to decode a command signal provided outside of the semiconductor apparatus to generate the power information which includes information regarding a range of variation of the external voltage.
A semiconductor apparatus comprising:
- a first rectification circuit configured to receive an external voltage through a first power line and to generate and output a first internal voltage to a second power line;
- a pumping circuit configured to receive the first internal voltage through the second power line and to generate and output a second internal voltage to a third power line;
- a first switching circuit configured to couple the first power line with the second power line;
- a second switching circuit configured to couple the first power line with the third power line;
- a control circuit configured to determine where the external voltage falls within a range between a minimum operating voltage and a target operating voltage referring to values stored in a built-in lookup table according to power information, and configured to control the first rectification circuit, the pumping circuit, the first switching circuit, and the second switching circuit according to a result of the determination;
- and
- a command decoder configured to decode a command signal provided outside of the semiconductor apparatus to generate the power information which includes information regarding a range of variation of the external voltage.
A memory system comprising:
- a host configured to output an external voltage and a command signal which includes information regarding a range of the external voltage;
- and
- a semiconductor memory apparatus including a plurality of sub-circuits configured to receive the external voltage as an input and generate at least one internal voltage based on the external voltage, the semiconductor memory apparatus configured to decode the command signal to generate the power information, and configured to determine where the external voltage falls in a range between a minimum operating voltage and a target operating voltage referring to values stored in a built-in lookup table according to the power information and configured to control the plurality of sub-circuits according to a result of the determination.
Dependencies are inferred from the claim text.