Device and method for implementing an operating mode based on opcodes
AssigneesSTMicroelectronics (Rousset) SAS, STMicroelectronics Belgium NV
InventorsMichael Peeters, Fabrice Marinet
Life of this patent
Estimating the term…
Abstract
The disclosure includes a method of authenticating a processor that includes an arithmetic and logic unit. At least one decoded operand of at least a portion of a to-be-executed opcode is received on a first terminal of the arithmetic and logic unit. A signed instruction is received on a second terminal of the arithmetic and logic unit. The signed instruction combines a decoded instruction of the to-be-executed opcode and a previous calculation result of the arithmetic and logic unit.
Claims20
A method, comprising:
- receiving, in a processing unit of a printer, a command including one or more opcodes from an ink cartridge installed in the printer;
- determining, with the processing unit, whether or not the one or more opcodes take into account data of a context register bank of the processing unit;
- and
- implementing, with the processing unit, a selected operating mode of the printer based on whether or not the one or more opcodes take into account data of the context register bank.
A printer, comprising:
- a processing unit configured to receive a command including one or more opcodes from an ink cartridge installed in the printer;
- and
- a context register bank of the processing unit, wherein the processing unit is configured to determine whether or not the one or more opcodes take into account data of a the context register bank of the processing unit and to implement a selected operating mode of the printer based on whether or not the one or more opcodes take into account data of the context register bank.
A printer, comprising an integrated circuit, the integrated circuit including:
- a decoding circuitry that operates to decode a first opcode into a decoded instruction and a plurality of decoded operands;
- a multiplexer circuitry that operates to select a first decoded operand from the plurality of decoded operands;
- a combination circuitry that operates to generate a signed instruction by combining the decoded instruction and signature data;
- and
- an arithmetic and logic circuitry that operates to determine whether the first opcode is authorized to be processed by the arithmetic and logic circuitry based on the signed instruction;
- wherein the signature data includes at least a portion of a second opcode processed by the arithmetic and logic circuitry prior to the first opcode.
Dependencies are inferred from the claim text.