Method and systems for creating electronic devices via maskless lithography

A maskless lithographic exposure system comprising:

• a maskless pattern writer configured to receive pattern data and expose a pattern on a surface of a target using a charged particle beam and according to the pattern data obtained by:
• generation of intermediate pattern data comprising common chip design data and one or more bit spaces or place holders reserved for non-common chip design data or information related to the non-common chip design data to be inserted after the generation, and
• an insertion, by the maskless lithographic exposure system, of the non-common chip design data or information related to the non-common chip design data into the one or more bit spaces or place holders of the intermediate pattern data before streaming the pattern data to the maskless pattern writer,
• wherein the common chip design data defines a common design layout part of an electronic device to be created on a wafer using the maskless pattern writer under control of the pattern data, the common design layout part being identical to other electronic devices created on the wafer, and
• wherein the non-common chip design data defines a non-common design layout part of said electronic device to be created on the wafer using the maskless pattern writer under control of the pattern data, the non-common design layout part being different from other electronic devices created on the wafer.

A data processing system comprising:

• a memory storing a set of instructions;
• and
• one or more processors configured to execute the set of instructions to cause the data processing system to perform operations for generating pattern data, wherein the pattern data represents at least a part of one or more electronic devices, to be created under control of the pattern data using a maskless lithographic exposure system comprising a maskless pattern writer, the operations comprising:
• generating intermediate pattern data comprising common chip design data and one or more bit spaces or place holders reserved for non-common chip design data or information related to the non-common chip design data to be inserted after the generating,
• introducing the non-common chip design data or information related to the non-common chip design data into the one or more bit spaces or place holders of the intermediate pattern data to obtain the pattern data before streaming the pattern data to the maskless pattern writer,
• wherein the common chip design data defines a common design layout part of an electronic device to be created on a wafer using the maskless pattern writer under control of the pattern data, the common design layout part being identical to other electronic devices created on the wafer,
• wherein the non-common chip design data defines a non-common design layout part of the electronic device to be created on the wafer using the maskless pattern writer under control of the pattern data, the non-common design layout part being different from other chips created on the wafer.