Semiconductor device structure with reduced critical dimension and method for preparing the same
AssigneeNanya Technology Corporation
InventorKuo-Hui Su
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AssigneeNanya Technology Corporation
InventorKuo-Hui Su
Estimating the term…
The present disclosure provides a semiconductor device structure and a method for preparing the semiconductor device structure. The semiconductor device structure includes a first conductive layer disposed over a semiconductor substrate; a first dielectric layer disposed over the first conductive layer; an energy-removable layer conformally deposited over the first dielectric layer in a pattern-dense region; a patterned mask disposed over the first dielectric layer and the energy-removable layer, wherein the patterned mask includes a first pattern disposed in the pattern-dense region, a second pattern disposed over a sidewall of the first pattern, and a third pattern disposed in a pattern-sparse region; and a plurality of processed areas disposed on a top surface of the energy-removable layer and between two adjacent first patterns and also disposed on the first pattern. A second critical dimension of the second pattern is smaller than a first critical dimension of the first pattern.
A method for preparing a semiconductor device structure, comprising:
Dependencies are inferred from the claim text.