Power semiconductor device including a shielding region

A power semiconductor device comprising:

• a base semiconductor layer comprising impurities of a first conductivity type;
• a body portion provided on the base semiconductor layer and defined by a source trench, the body portion comprising a gate trench extending inwardly from an upper surface of the body portion;
• a gate electrode provided in the gate trench;
• a source electrode provided on the body portion and spaced apart from the gate electrode;
• and
• a drain electrode provided below the base semiconductor layer,
• wherein the body portion comprises:
• a drift layer comprising impurities of the first conductivity type, a lower drift layer provided on the base semiconductor layer, and an upper drift layer provided on the lower drift layer;
• a pillar region covering the drift layer along a bottom surface and inner side surfaces of the source trench, the pillar region comprising impurities of a second conductivity type different from the first conductivity type;
• and
• at least one shielding region provided between the lower drift layer and the upper drift layer, the at least one shielding region comprising impurities of the second conductivity type.

A power semiconductor device comprising:

• a base semiconductor layer comprising impurities of a first conductivity type;
• a body portion provided on the base semiconductor layer and defined by a source trench, the body portion comprising 4H-SiC and a gate trench extending inwardly from an upper surface of the body portion;
• a gate electrode provided in the gate trench;
• a source electrode spaced apart from the gate electrode and provided on the body portion;
• and
• a drain electrode provided below the base semiconductor layer,
• wherein the body portion comprises:
• a drift layer comprising impurities of the first conductivity type, a lower drift layer provided on the base semiconductor layer, and an upper drift layer provided on the lower drift layer;
• a pair of shielding regions provided between the lower drift layer and the upper drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions comprising impurities of a second conductivity type different from the first conductivity type;
• a pillar region covering the lower drift layer, the pair of shielding regions, and the upper drift layer along a bottom surface and inner side surfaces of the source trench, the pillar region comprising impurities of the second conductivity type;
• a base region provided on the drift layer and doped with impurities of the second conductivity type at a concentration lower than a concentration of the impurities of the second conductivity type of the pair of shielding regions;
• a source region provided on the base region, connected to the source electrode, and doped with impurities of the first conductivity type at a concentration higher than a concentration of the impurities of the first conductivity type of the drift layer;
• and
• a pair of ohmic regions disposed at ends of the base region and the source region to be in contact with an upper end of the pillar region, the pair of ohmic regions being doped with impurities of the second conductivity type at a concentration higher than the concentration of the impurities of the second conductivity type of the base region.