Transistor body-induced body leakage mitigation at low temperature
AssigneeIntel Corporation
InventorsAbhishek Anil Sharma, Wilfred Gomes, Pushkar Ranade, Willy Rachmady, Ravi Pillarisetty
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Abstract
Integrated circuit (IC) including transistors with high-mobility/high-saturation velocity, non-silicon channel materials coupled to a silicon substrate through counter-doped sub-channel materials, which greatly reduce electrical leakage currents through the substrate when the IC is operated at very low temperatures (e.g., below −25 C). With low temperature operation, high transistor performance associated with the non-silicon channel materials can be integrated into high density IC architectures that avoid the limitations associated with semiconductor material layer transfers.
Claims18
An integrated circuit (IC) die, comprising:
- a plurality of transistor structures, wherein individual ones of the transistor structures comprise:
- a channel material comprising Ge or a III-V alloy;
- a sub-channel material comprising Ge or a III-V alloy, wherein the sub-channel material is between the channel material and a substrate layer of monocrystalline silicon;
- and
- a gate stack, a source, and a drain coupled to the channel material, wherein at least one of the channel material, the source, or the drain is of a first conductivity type and is in direct physical contact with the sub-channel material, and wherein the sub-channel material is of a second, complementary, conductivity type;
- and
- a cooling structure comprising a plurality of microchannels within the IC die, the microchannels below, or laterally adjacent to, an interconnect metallization feature of the IC die, and the microchannels to convey a heat transfer liquid to maintain at least some of the transistor structures at a temperature below −25° C. during operation of the IC die.
A computer system, comprising:
- an integrated circuit (IC) die, comprising:
- a plurality of transistor structures, wherein individual ones of the transistor structures comprise:
- a channel material comprising Ge or a III-V alloy;
- a sub-channel material also comprising Ge or a III-V alloy, wherein the sub-channel material is between the channel material and a substrate layer of monocrystalline silicon;
- and
- a gate, a source, and a drain coupled to the channel material, wherein at least one of the channel material, the source, or the drain has a first conductivity type and is in direct physical contact with the sub-channel material, and wherein the sub-channel material has a second, complementary, conductivity type;
- and
- an IC-die integrated cooling structure comprising a plurality of first microchannels within the IC die, the first microchannels to convey a first heat transfer liquid;
- and
- an IC die package attached to the IC die, wherein the IC die package comprises a package integrated liquid cooling structure comprising a plurality of second microchannels to convey a second heat transfer liquid, wherein the IC-die integrated cooling structure and the package integrated liquid cooling structure are to maintain at least some of the transistor structures at a temperature below −25° C. during operation of the IC die.
Dependencies are inferred from the claim text.