Circuit board having an edge containing conductive regions
AssigneeTeradyne, Inc.
InventorDaniel L. Engel
Life of this patent
Estimating the term…
Abstract
An example apparatus includes a circuit board. The circuit board includes one or more layers that form first electrically conductive regions and electrically non-conductive regions; an edge at an angle relative to the one or more layers; and second electrically conductive regions on the edge that are electrically connected to one or more of the first electrically conductive regions. The second electrically conductive regions are substantially flat and each has a connection surface that is substantially parallel to a surface of the edge.
Claims20
An apparatus comprising:
- a circuit board comprising:
- layers that form first electrically conductive regions and electrically non-conductive regions, the first electrically conductive regions comprising a first electrically conductive trace inside the circuit board and a second electrically conductive trace on an outer surface of the circuit board;
- an edge at an angle relative to the layers;
- second electrically conductive regions on the edge, the second electrically conductive regions being substantially flat and each having a connection surface that is substantially parallel to a surface of the edge;
- wherein the first electrically conductive trace is electrically connected to a first one of the second electrically conductive regions;
- and
- a third electrically conductive trace on the edge of the circuit board, the third electrically conductive trace being electrically connected to a second one of the second electrically conductive regions and to the second electrically conductive trace.
An apparatus comprising:
- a circuit board comprising:
- layers that form first electrically conductive regions and electrically non-conductive regions;
- an edge at an angle relative to the layers;
- and
- second electrically conductive regions on the edge, at least some of the second electrically conductive regions each being electrically connected to one or more of the first electrically conductive regions, the second electrically conductive regions being substantially flat and each having a connection surface that is substantially parallel to a surface of the edge;
- wherein the circuit board comprises a test instrument or a subassembly of the test instrument.
A method of processing a circuit board comprising an edge plated with electrically conductive material, the method comprising:
- mounting the circuit board to enable a tool to access the edge;
- controlling the tool to execute a path to remove some of the electrically conductive material from the edge to form electrically conductive regions on the edge, the electrically conductive regions being electrically isolated from each other on the edge, and the electrically conductive regions being substantially flat and each having a connection surface that is within a substantially same plane;
- and
- following removal of some of the electrically conductive material from the edge to form the electrically conductive regions, filling regions between at least some of the electrically conductive regions with a dielectric material.
A method of processing a circuit board comprising an edge plated with electrically conductive material, the method comprising:
- mounting the circuit board to enable a tool to access the edge;
- and
- controlling the tool to execute a path to remove some of the electrically conductive material from the edge to form electrically conductive regions on the edge, the electrically conductive regions being electrically isolated from each other on the edge, and the electrically conductive regions being substantially flat and each having a connection surface that is within a substantially same plane;
- wherein the tool comprises a computer numerical controlled (CNC) milling machine that rotates a structure to remove at least some of the electrically conductive material from the edge gradually.
A method of processing a circuit board comprising an edge plated with electrically conductive material, the method comprising:
- mounting the circuit board to enable a tool to access the edge;
- and
- controlling the tool to execute a path to remove some of the electrically conductive material from the edge to form electrically conductive regions on the edge, the electrically conductive regions being electrically isolated from each other on the edge, and the electrically conductive regions being substantially flat and each having a connection surface that is within a substantially same plane;
- wherein the circuit board is part of a test instrument, the test instrument for sending test signals to a device under test (DUT) and for analyzing responses from the DUT;
- and
- wherein the method further comprises:
- coupling the circuit board to a device interface board (DIB) including electrically connecting the electrically conductive regions to the DIB, the DIB comprising a contact that electrically connects to the DUT;
- sending the test signals from the circuit board to the DUT via the electrically conductive regions;
- and
- receiving, at the circuit board, the responses from the DUT via the electrically conductive regions.
A method of processing a circuit board comprising an edge plated with electrically conductive material, the method comprising:
- mounting a circuit board to enable chemical etching of the edge;
- performing chemical etching on the edge to remove some of the electrically conductive material from the edge to form electrically conductive regions on the edge, the electrically conductive regions being electrically isolated from each other on the edge, and the electrically conductive regions being substantially flat and each having a connection surface that is within a substantially same plane;
- and
- following removal of some of the electrically conductive material from the edge to form the electrically conductive regions, filling regions between at least some of the electrically conductive regions with a dielectric material.
A system comprising:
- a first circuit board comprising first electrically conductive regions;
- and
- a second circuit board comprising:
- layers that form second electrically conductive regions and electrically non-conductive regions, the second circuit board comprising an edge at an angle relative to the layers;
- and
- third electrically conductive regions on the edge, the third electrically conductive regions being substantially flat and each having a connection surface that is substantially parallel to a surface of the edge, the third electrically conductive regions being electrically connected to the first electrically conductive regions and to the second electrically conductive regions;
- wherein the first circuit board and the second circuit board are physically coupled to each other, the second circuit board being at an oblique angle or a right angle relative to the first circuit board;
- wherein the second circuit board comprises a test instrument or a subassembly of the test instrument.
A system comprising:
- a first circuit board comprising first electrically conductive regions;
- and
- a second circuit board comprising:
- layers that form second electrically conductive regions and electrically non-conductive regions, the second circuit board comprising an edge at an angle relative to the layers;
- and
- third electrically conductive regions on the edge, the third electrically conductive regions being substantially flat and each having a connection surface that is substantially parallel to the edge surface, the third electrically conductive regions being electrically connected to the first electrically conductive regions and to the second electrically conductive regions;
- wherein the first circuit board and the second circuit board are physically coupled to each other, the second circuit board being at an oblique angle or a right angle relative to the first circuit board;
- wherein the first circuit board comprises a device interface board (DIB), the DIB being configured to hold a device under test (DUT);
- wherein the system further comprises a test instrument comprising the second circuit board, the test instrument being configured to perform operations comprising:
- sending test signals to the DUT via the third electrically conductive regions;
- receiving responses from the DUT via the third electrically conductive regions;
- and
- analyzing the responses to determine whether the DUT passed or failed testing.
Dependencies are inferred from the claim text.