Apparatus and method for dynamic data plane layer 2 clock frequency/voltage adjustment

An apparatus for a user equipment (UE), comprising:

• a baseband chip, comprising:
• a data plane (DP) subsystem, comprising:
• a DP clock generation unit configured to set a frequency level for the DP subsystem;
• a DP power control unit configured to set a voltage level for the DP subsystem;
• a microcontroller (uC) cluster comprising a DP frequency/voltage selection component configured to:
• determine a frequency-level adjustment and a voltage-level adjustment associated with a slot based on a set of inputs;
• configure the DP clock generation unit with the frequency-level adjustment;
• and
• configure the DP power control unit with the voltage-level adjustment.

A method for configuration of a baseband chip, comprising:

• setting, by a data plane (DP) clock generation unit of a DP subsystem, a frequency level for the DP subsystem;
• setting, by a DP power control unit of the DP subsystem, a voltage level for the DP subsystem;
• determining, by a DP frequency/voltage selection component of a microcontroller (uC) cluster, a frequency-level adjustment, and a voltage-level adjustment associated with a slot based on a set of inputs, the uC cluster being part of the DP subsystem;
• configuring, by the DP frequency/voltage selection component of the uC cluster, the DP clock generation unit with the frequency-level adjustment;
• and
• configuring, by the DP frequency/voltage selection component of the uC cluster, the DP power control unit with the voltage-level adjustment.