Method, apparatus, and system for improving reliability of data transmission involving an ethernet device
AssigneeHuawei Technologies Co., Ltd.
InventorsYuchun Lu, Yan Zhuang
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Abstract
A data transmission method, apparatus, and system are applied to the field of communication technologies. The method includes: performing demultiplexing processing on obtained y first data streams to obtain x second data streams, where the y first data streams are obtained through bit multiplexing processing; mapping the x second data streams at a granularity of n bits to obtain z third data streams; and outputting the z third data streams over an output lane, where y, x, n, and z are all positive integers, and n≥2. The method may be applied to an Ethernet high-speed interface.
Claims28
A data transmission method, comprising:
- performing, by a physical medium attachment (PMA) layer of a physical layer (PHY) chip of a transmitting device, processing on at least one of x second data streams to obtain x processed second data streams, wherein the processing includes modification of a timing of the at least one of the x second data streams, where x is a positive integer;
- performing, by the PMA layer, first block-level multiplexing processing on the x processed second data streams to obtain z third data stream(s), where z is a positive integer, x>z, and z≥1;
- and
- outputting, by the PMA layer, the z third data stream(s) over z output lane(s).
A data transmission method, comprising:
- obtaining, by a physical medium attachment (PMA) layer of a physical layer (PHY) chip of a receiving device, z third data stream(s) over z input lane(s), wherein the z third data stream(s) are based on first block-level multiplexing processing, where z is a positive integer, and z≥1;
- performing, by the PMA layer, first block-level demultiplexing processing on the z third data stream(s) to obtain x demultiplexed second data streams, where x is a positive integer, and x>z;
- and
- performing, by the PMA layer, processing on at least one of x demultiplexed second data streams to obtain x processed second data streams, wherein the processing includes modification of a timing of the at least one of the x demultiplexed second data streams.
A transmitting device, comprising:
- a physical medium attachment (PMA) layer of a physical layer (PHY) chip, wherein the PMA layer is configured to:
- perform processing on at least one of x second data streams to obtain x processed second data streams, wherein the processing includes modification of a timing of the at least one of the x second data streams, where x is a positive integer;
- perform first block-level multiplexing processing on the x processed second data streams to obtain z third data stream(s), where z is a positive integer, x>z, and z≥1;
- and
- an interface configured to output the z third data stream(s) over z output lane(s).
A receiving device, comprising:
- a first interface configured to obtain z third data stream(s) over z input lane(s), wherein the z third data stream(s) are based on first block-level multiplexing processing, where z is a positive integer, and z≥1;
- and
- a physical medium attachment (PMA) layer of a physical layer (PHY) chip, wherein the PMA layer is configured to:
- perform first block-level demultiplexing processing on the z third data stream(s) to obtain x demultiplexed second data streams, where x is a positive integer, and x>z;
- and
- perform processing on at least one of x demultiplexed second data streams to obtain x processed second data streams, wherein the processing includes modification of a timing of the at least one of the x demultiplexed second data streams.
Dependencies are inferred from the claim text.