Fast efficient decoder for low distance RS and BCH codes
AssigneeCredo Technology Group Limited
InventorsChang Shu, Yu Liao, Junqing Sun
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AssigneeCredo Technology Group Limited
InventorsChang Shu, Yu Liao, Junqing Sun
Estimating the term…
An illustrative decoder includes: a syndrome calculator, a location finder, and an error corrector. The syndrome calculator has an array of logic gates to obtain syndrome values as a product of a receive message vector and a parity check matrix, the syndrome values including at least a three ten-bit syndrome values S1, S2, and S3. The location finder derives a number of errors from the syndrome values, and uses a second array of logic gates to obtain two polynomial roots as a product of a syndrome value vector and a quadratic solution matrix when the number of errors is two, the quadratic solution matrix corresponding to a determination of a quadratic equation's trailing coefficient value s, a determination of the quadratic equation's roots, and a reversal of a variable substitution. The location finder further determines a bit index for each of the polynomial roots.
A circuit for correcting bit errors in a received version of a RS or BCH encoded bit stream, the circuit comprising:
An error correction method that comprises:
An error correction method that comprises:
Dependencies are inferred from the claim text.