Hardware multiplexed memory for unidirectional data transfer

A trail cam system, comprising:

• a movement detector and image/video capture module (P2) configured for placement at a remote location near a trail, and configured for sensing movement within a field of view and capturing images and/or video corresponding to the movement within the field of view;
• a radio-enabled module (P1) configured for transmitting the captured images and/or the captured video to a remote trail monitoring station;
• a circuit for unilaterally transferring data from the P2 to the P1, wherein both the P1 and the P2 support data transfer using Quad Serial Peripheral Interface (QSPI) protocol, the P1 comprises four data input/output (I/O) lines (P1 Data) and the P2 further comprises four data I/O lines (P2 Data);
• and
• the trail cam system further configured for repeating an image/video data transfer sequence wherein the P2 initiates a first state, S1, by initially de-asserting the EN signal to deactivate the P1, the MUX1 and the MUX2, followed by the P2 setting the CS signal in the first state, S1, finally the P2 asserting the EN signal to activate the P1, the MUX1 and the MUX2, thereby allowing the P2 to write a first segment of image and/or video data to the M2 through the MUX2 and the P1 to read previously written, pre-first segment image and/or video data from the M1 through the MUX1, wherein upon the P2 finishing writing the first segment of image and/or video data to the M2, the P2 initiates a second state, S2, by first deactivating the P1, the MUX1 and the MUX2 by de-asserting the EN signal followed by setting the CS signal to the second state, S2, and finally asserting the EN signal to allow the P2 to write a second segment of image and/or video data to the M1 through the MUX1, and the P1 to read the first segment of image and/or video data from the M2 through the MUX2, and wherein upon the P2 finishing writing the second segment of image and/or video data to the M1, the P1 reverts to the first state, S1, by first deactivating the P1, the MUX1 and the MUX2 by de-asserting the EN signal followed by setting the CS signal back to the first state, S1, and finally asserting the EN signal thereby activating the P1, the MUX1 and the MUX2, thereby repeating the image/video data transfer sequence from the first state, S1.

A remote weather monitoring system, comprising:

• a weather station data gathering module (P2) comprising weather sensors configured for placement at a preselected location, and configured for periodically gathering weather data sensed at the preselected location;
• a radio-enabled module (P1) configured for transmitting the weather data to a remote weather monitoring station;
• a circuit for unilaterally transferring the weather data from the P2 to the P1, wherein both the P1 and the P2 support data transfer using Quad Serial Peripheral Interface (QSPI) protocol, the P1 comprises four data input/output (I/O) lines (P1 Data) and the P2 further comprises four data I/O lines (P2 Data);
• and
• the remote weather monitoring system further configured for repeating a weather data transfer sequence wherein the P2 initiates a first state, S1, first by the P2 de-asserting the EN signal to deactivate the P1, the MUX1 and the MUX2, followed by the P2 setting the CS signal in first state, S1, and finally by the P2 asserting the EN signal to activate the P1, the MUX1 and the MUX2, allowing the P2 to write a first segment of weather data to the M2 through the MUX2 and the P1 to read pre-first segment weather data from the M1 through the MUX1, wherein upon the P2 finishing writing the first segment of weather data to the M2, the P2 initiates a second state, S2, first deactivating the P1, the MUX1 and the MUX2 by de-asserting the EN signal, followed by the P2 changing the CS signal to a second state, S2, and finally the P2 asserting the EN signal to allow the P2 to write a second segment of weather data to the M1 through the MUX1 and the P1 to read the first segment of weather data from the M2 through the MUX2, wherein upon the P2 finishing writing the second segment of weather data to the M1, the P1 reverting back to the first state, S1, by first deactivating the P1, the MUX1 and the MUX2 by de-asserting the EN signal followed by the P2 reverting the CS signal back to the first state, S1, and finally reactivating the P1, the MUX1 and the MUX2 by asserting the EN signal, thereby repeating the weather data transfer sequence from the first state, S1.

A method for unilaterally transferring data to a secondary processor (P1) from a primary processor (P2), wherein both of the processors, P1 and P2, support data transfer using Quad Serial Peripheral Interface (QSPI) protocol, the method comprising:

• providing a unidirectional hardware multiplexed memory circuit, comprising:
• a first 2-1 multiplexer (MUX1) having first state data input lines in communication with P1 data lines (P1 Data) and second state data input lines, in communication with P2 data lines (P2 Data);
• a second 2-1 multiplexer (MUX2) having first state data input lines in communication with the P2 Data and second state data input lines in communication with the P1 Data;
• a first QSPI memory (M1) having data I/O lines (M1 Data) in communication with MUX1 output data lines;
• a second QSPI memory (M2) having data I/O lines (M2 Data) in communication with MUX2 output data lines;
• wherein the P2 further comprises a first general purpose I/O line configured as an enable (EN) output signal in communication with corresponding enable input signals on the P1, the MUX1 and the MUX2;
• and
• wherein the P2 further includes a second general purpose I/O line configured as a chip select (CS) output signal in communication with corresponding chip select input signals on the P1, the MUX1 and the MUX2;
• repeating a data transfer sequence, wherein during a first state, S1, the P1 reads pre-first segment data from the M1 and the P2 writes first segment data to the M2, upon the P2 completing writing the first segment data, P2 initiating a second state, S2, during which the P1 reads the first segment data from the M2 and the P2 writes second segment data to the M1, upon completion of the P2 writing the second segment data, reverting back to the first state, S1, and repeats the data transfer sequence from the first state, S1;
• and
• initiating the first state, S1, by:
• the P2 de-asserting the EN signal, thereby deactivating the P1, the MUX1 and the MUX2;
• the P2 driving the CS signal into the first state, S1;
• and
• the P2 asserting the EN signal to enable the P1, the MUX1 and the MUX2;
• during the first state, S1:
• the P2 writing a first segment of data to the M2 through the MUX2;
• the P1 reading pre-first segment data from the M1 through the MUX1;
• and
• the P2 finishing writing the first segment data to the M2;
• initiating the second state, S2, by:
• the P2 de-asserting the EN signal, thereby deactivating the P1, the MUX1 and the MUX2;
• the P2 changing the CS signal to the second state, S2;
• and
• the P2 asserting the EN signal;
• during the second state, S2:
• the P2 writing a second segment data to the M1 through the MUX1;
• the P2 reading the first segment data from the M2 through the MUX2;
• and
• the P2 finishing writing the second segment data to the M1;
• and
• if the P2 has another segment of data to write, repeating the data transfer sequence from the initiating the first state, S1.