Hardware assisted page migration in a multi-dielet processing system

Apparatus comprising:

• a first circuit disposed on a first dielet and configured to communicate a memory binding to the first dielet and to a further circuit disposed on a at least one further dielet;
• a second circuit configured to receive a memory access request;
• and
• a third circuit configured to generate a page migration notification on the first dielet or the at least one further dielet based on associating the received memory access request with a previously communicated memory binding;
• the third circuit further configured to conditionally generate the page migration notification when the received memory access request causes one of the first circuit and the further circuit to indicate memory access traffic above a threshold to a page associated with the communicated memory binding.