Hardware control path redundancy for functional safety of peripherals
AssigneeTexas Instruments Incorporated
InventorsVeeramanikandan Raju, Anand Kumar G
Life of this patent
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Abstract
A circuit includes primary register circuitry to receive a first signal to write a first value to the primary register circuitry; secondary register circuitry to receive a second signal to write a second value to the secondary register circuitry; a counter configured to count a set amount of time from when the first signal is received; and a controller coupled to the counter. The controller receives at least one of: a third signal indicating whether the second signal was detected within the set amount of time, and a fourth signal indicating whether the first value is the same as the second value.
Claims20
A circuit comprising:
- primary register circuitry configured to receive a first signal to write a first value to the primary register circuitry, the primary register circuitry including a primary register and a primary shadow register coupled to the primary register;
- secondary register circuitry configured to receive a second signal to write a second value to the secondary register circuitry, the secondary register circuitry including a secondary register and a secondary shadow register coupled to the secondary register;
- a counter configured to count a set amount of time from when the first signal is received;
- a controller coupled to the counter, the controller configured to receive at least one of:
- a third signal indicating whether the second signal was detected within the set amount of time, and
- a fourth signal indicating whether the first value is the same as the second value;
- a primary control register coupled to the controller and the primary shadow register;
- and
- a redundant control register coupled to the primary control register and the primary shadow register.
A method comprising:
- detecting a first signal to write a first value;
- writing the first value to primary register circuitry;
- starting a timer in response to detecting the first signal;
- determining whether a second signal to write a second value to secondary register circuitry is detected within a set amount of time as determined by the timer;
- and
- based on whether the second signal was detected within the set amount of time, performing one of:
- writing the second value to the secondary register circuitry when the second signal was detected within the set amount of time, and
- when the second signal was not detected within the set amount of time, asserting a safety warning signal, incrementing a safety warning count in response to assertion of the safety warning signal, and comparing the incremented safety warning count to a safety warning threshold.
Dependencies are inferred from the claim text.