System and method for addressing data in memory
AssigneeTexas Instruments Incorporated
InventorsTimothy David Anderson, Duc Quang Bui, Joseph Zbiciak, Kai Chirca
Life of this patent
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Abstract
A digital signal processor having a CPU with a program counter register and, optionally, an event context stack pointer register for saving and restoring the event handler context when higher priority event preempts a lower priority event handler. The CPU is configured to use a minimized set of addressing modes that includes using the event context stack pointer register and program counter register to compute an address for storing data in memory. The CPU may also eliminate post-decrement, pre-increment and post-decrement addressing and rely only on post-increment addressing.
Claims18
A device comprising:
- a set of control registers that includes a program counter register and a stack pointer register, wherein the stack pointer register includes a first field configured to store a first portion of a base address and a second field configured to store a nested count;
- and
- a set of functional units coupled to the set of control registers and configured to:
- in a first mode, load a first set of data from a first address specified by the program counter register;
- and
- in a second mode, load a second set of data from a second address specified by the stack pointer register.
A device comprising:
- a set of control registers that includes a program counter register and a stack pointer register, wherein the stack pointer register includes a first field configured to store a first portion of a base address and a second field configured to store a nested count;
- and
- a set of functional units coupled to the set of control registers and configured to:
- in a first mode, store a first set of data to a first address specified by the program counter register;
- and
- in a second mode, store a second set of data to a second address specified by the stack pointer register.
A method comprising:
- receiving an instruction;
- determining whether to generate an address associated with the instruction based on a first value stored in a program counter register or on a second value stored in a stack pointer register, wherein the stack pointer register includes a first field configured to store a first portion of a base address and a second field configured to store a nested count;
- generating the address based on a result of the determining step;
- and
- performing the instruction using the address.
Dependencies are inferred from the claim text.