FinFET device with partial interface dipole formation for reduction of gate induced drain leakage

A method for forming a semiconductor device, comprising:

• forming a vertical fin on a semiconductor substrate and defining a longitudinal axis;
• forming a source region and a drain region adjacent respective opposed ends of the vertical fin;
• forming a dipole layer disposed on the vertical fin;
• forming an electrode structure disposed between the source region and the drain region arranged about the vertical fin, the electrode structure including:
• a dielectric liner disposed on the dipole layer and the vertical fin;
• and
• a gate metal disposed on the dielectric liner,
• forming a first outer spacer disposed between the source region and the electrode structure;
• and
• forming a second outer spacer disposed between the drain region and the electrode structure;
• wherein the dipole layer includes a first end in contact with the first outer spacer and a second end spaced from the second outer spacer'
• wherein a first longitudinal section of the electrode structure is in contact with the dipole layer, and
• wherein a second longitudinal section of the electrode structure is in contact with the vertical fin and devoid of the dipole layer.

A method for forming a semiconductor device, comprising:

• forming a vertical fin on a semiconductor substrate, the vertical fin including source and drain regions separated by a gate region, the vertical fin defining a first axis corresponding to a length of the fin, a second axis corresponding to a thickness of the fin and a third axis corresponding to a height of the fin;
• forming a dummy gate adjacent the gate region of the vertical fin;
• forming a first spacer onto the dummy gate to encompass the dummy gate;
• forming a second spacer onto the first spacer to encompass the first spacer;
• removing the dummy gate and a segment of the inner spacer adjacent the source region to define a cavity between the outer spacer and a remaining opposed segment of the inner spacer adjacent the drain region;
• depositing a dipole layer to at least line the cavity;
• removing the remaining opposed segment of the inner spacer adjacent the drain region to define a gap within the cavity between the liner and an opposed segment of the outer spacer adjacent the drain region, the gap devoid of the dipole layer;
• depositing a high-k liner at least within the inner cavity to cover the dipole layer and line the surface of the vertical fin below the gap;
• and
• depositing a gate electrode material within the cavity to form a gate structure.