Semiconductor circuit
AssigneeSony Semiconductor Solutions Corporation
InventorKazunori Hasebe
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor circuit that includes a plurality of amplifiers that is connected in series and individually amplify and supply a signal on an input side to an output side. A first chopper switch is connected to an input side of a first amplifier connected first among the plurality of amplifies, and a second chopper switch is connected to an output side of the first amplifier. The first and second chopper switches act in synchronism with a first chopper clock. A third chopper switch is connected to an input side of a second amplifier, and a fourth chopper switch is connected to an output side of the second amplifier. The third and fourth chopper switches act in synchronism with a second chopper clock. A phase compensation capacitor is connected at one end to an input portion of the third chopper switch.
Claims12
A semiconductor circuit, comprising:
- a plurality of amplifiers, wherein
- each of the plurality of amplifiers is in a series connection, and
- the each of the plurality of amplifiers is configured to:
- receive a signal;
- amplify the received signal;
- and
- output the amplified signal;
- a first chopper switch connected to an input side of a first amplifier of the plurality of amplifiers;
- a second chopper switch connected to an output side of the first amplifier, wherein the first chopper switch and the second chopper switch are configured to act in synchronism with a first chopper clock;
- a third chopper switch connected to an input side of a second amplifier of the plurality of amplifiers;
- a fourth chopper switch connected to an output side of the second amplifier, wherein
- a position of the second amplifier is subsequent to a position of the first amplifier in the series connection,
- the third chopper switch and the fourth chopper switch are configured to act in synchronism with a second chopper clock, and
- the each of the first chopper switch, the second chopper switch, the third chopper switch, and the fourth chopper switch is configured to:
- switch between a first action to pass a plurality of differential input signals, and a second action to cross the plurality of differential input signals in synchronism with one of the first chopper clock or the second chopper clock;
- and
- output, as a plurality of differential output signals, one of the passed plurality of differential input signals or the crossed plurality of differential input signals;
- and
- a first phase compensation capacitor that includes a first end, wherein the first end of the first phase compensation capacitor is connected to a first differential input portion of the third chopper switch.
Dependencies are inferred from the claim text.