Authentication code generation/checking instructions

A method comprising:

• in response to an authentication code generation instruction specifying a first source value, controlling processing circuitry to:
• generate an authentication code dependent on the first source value;
• and
• store the authentication code to a memory location associated with a store address formed using a value obtained from a register;
• wherein the authentication code generation instruction is a single instruction;
• in further response to the authentication code generation instruction, generating:
• an authentication code generation micro-operation to control the processing circuitry to generate the authentication code;
• and
• an authentication code storing micro-operation to control the processing circuitry to store the authentication code to the memory location associated with the store address;
• generating the authentication code in response to the authentication code generation micro-operation and maintaining state information indicative of the authentication code for at least one cycle after a cycle in which the authentication code was generated;
• and
• in response to the authentication code storing micro-operation, retrieving the authentication code that has been preserved as a consequence of retaining state, prior to storing the authentication code to the memory location associated with the store address.

A non-transitory, computer-readable storage medium storing a computer program to control a host data processing apparatus to provide an instruction execution environment for execution of target code, the computer program comprising:

• instruction decoding program logic to decode instructions of the target code to control the host data processing apparatus to perform data processing;
• and
• register maintenance program logic to maintain a register emulating structure in memory or in host registers which emulates registers of a target instruction set architecture of the target code;
• wherein the instruction decoding program logic is responsive to an authentication code generating instruction to:
• generate an authentication code dependent on the first source value;
• and
• store the authentication code to a memory address associated with a store address in a simulated address space, the store address being formed using a value obtained from the register emulating structure;
• and
• wherein the authentication code generation instruction is a single instruction;
• wherein the instruction decoding program logic is responsive to the authentication code generation instruction to generate:
• an authentication code generation micro-operation to control the host data processing apparatus to generate the authentication code;
• and
• an authentication code storing micro-operation to control the host data processing apparatus to store the authentication code to the memory location associated with the store address;
• wherein the computer program comprises authentication code generation program logic to generate the authentication code in response to the authentication code generation micro-operation, the authentication code generation program logic comprising state retaining program logic to maintain state information indicative of the authentication code for at least one cycle after a cycle in which the authentication code was generated;
• and
• wherein the computer program is responsive to the authentication code storing micro-operation to retrieve from the authentication code generation program logic the authentication code that has been preserved as a consequence of the state retaining program logic retaining state, prior to storing the authentication code to the memory location associated with the store address.

An apparatus comprising:

• processing circuitry configured to execute instructions;
• and
• decode circuitry configured to decode the instructions for execution by the processing circuitry;
• wherein the decode circuitry is responsive to an authentication code checking instruction specifying a source value to control the processing circuitry to:
• read a data value from a memory location associated with a load address formed using a value obtained from a register;
• generate an expected authentication code dependent on the source value;
• compare the data value with the expected authentication code;
• and
• trigger an error handling response when a mismatch is detected between the data value and the expected authentication code;
• and
• wherein the authentication code checking instruction is a single instruction;
• wherein the decode circuitry is further responsive to an authentication code generation instruction to generate:
• an authentication code generation micro-operation to control the processing circuitry to generate the authentication code;
• and
• an authentication code storing micro-operation to control the processing circuitry to store the authentication code to the memory location associated with the store address;
• wherein the processing circuitry comprises authentication code generation circuitry configured to generate the authentication code in response to the authentication code generation micro-operation, the authentication code generation circuitry comprising state retaining circuitry to maintain state information indicative of the authentication code for at least one cycle after a cycle in which the authentication code was generated;
• and
• wherein the processing circuitry is responsive to the authentication code storing micro-operation to retrieve from the authentication code generation circuitry the authentication code that has been preserved as a consequence of the state retaining circuitry retaining state, prior to storing the authentication code to the memory location associated with the store address.

A method comprising:

• in response to an authentication code checking instruction specifying a source value, controlling processing circuitry to:
• read a data value from a memory location associated with a load address formed using a value obtained from a register;
• generate an expected authentication code dependent on the source value;
• compare the data value with the expected authentication code;
• and
• trigger an error handling response when a mismatch is detected between the data value and the expected authentication code;
• wherein the authentication code checking instruction is a single instruction
• in further response to an authentication code generation instruction, generating:
• an authentication code generation micro-operation to control the processing circuitry to generate the authentication code;
• and
• an authentication code storing micro-operation to control the processing circuitry to store the authentication code to the memory location associated with the store address;
• generating the authentication code in response to the authentication code generation micro-operation and maintaining state information indicative of the authentication code for at least one cycle after a cycle in which the authentication code was generated;
• and
• in response to the authentication code storing micro-operation, retrieving the authentication code that has been preserved as a consequence of the state retaining circuitry retaining state, prior to storing the authentication code to the memory location associated with the store address.

A non-transitory, computer-readable storage medium storing a computer program to control a host data processing apparatus to provide an instruction execution environment for execution of target code, the computer program comprising:

• instruction decoding program logic to decode instructions of the target code to control the host data processing apparatus to perform data processing;
• and
• register maintenance program logic to maintain a register emulating structure in memory or in host registers which emulates registers of a target instruction set architecture of the target code;
• wherein the instruction decoding program logic is responsive to an authentication code checking instruction to:
• read a data value from a memory location associated with a load address in a simulated address space, the load address being formed using a value obtained from the register emulating structure;
• generate an expected authentication code dependent on the source value;
• compare the data value with the expected authentication code;
• and
• trigger an error handling response when a mismatch is detected between the data value and the expected authentication code;
• and
• wherein the authentication code checking instruction is a single instruction;
• wherein the instruction decoding program logic is responsive to an authentication code generation instruction to generate:
• an authentication code generation micro-operation to control the host data processing apparatus to generate the authentication code;
• and
• an authentication code storing micro-operation to control the host data processing apparatus to store the authentication code to the memory location associated with the store address;
• wherein the computer program comprises authentication code generation program logic to generate the authentication code in response to the authentication code generation micro-operation, the authentication code generation program logic comprising state retaining program logic to maintain state information indicative of the authentication code for at least one cycle after a cycle in which the authentication code was generated;
• and
• wherein the computer program is responsive to the authentication code storing micro-operation to retrieve from the authentication code generation program logic the authentication code that has been preserved as a consequence of the state retaining program logic retaining state, prior to storing the authentication code to the memory location associated with the store address.