Host, information processing method, electronic system, and readable memory medium
AssigneeYangtze Memory Technologies Co., Ltd.
InventorKaiyao Cao
Life of this patent
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Abstract
Examples of the present disclosure disclose a host, an information processing method, an electronic system, and the readable memory medium. Wherein the host includes: a processor; the processor includes: a first central processing unit (CPU) core bound with a first thread and a second CPU core bound with a second thread; wherein, the first CPU core is configured to: in response to control of the first thread, send an input/output (I/O) request to a memory device coupled to the host; the second CPU core is configured to: in response to the control of the second thread, receive feedback information which is related to the I/O request and sent by the memory device.
Claims20
A host, comprising:
- a processor, comprising:
- a doorbell register comprising a plurality of distribution channels;
- a first central processing unit (CPU) core bound with a first thread and configured to:
- in response to control of the first thread,
- determine a distribution channel from among the plurality of distribution channels of the doorbell register as unoccupied based an identification bit corresponding to the distribution channel having a first value;
- change the identification bit corresponding to the distribution channel from the first value to a second value to indicate the distribution channel is occupied;
- and
- send an input/output (I/O) request to a memory device coupled to the host via the distribution channel, wherein the first thread comprises a sending kernel thread of a kernel space;
- and
- a second CPU core bound with a second thread and configured to:
- in response to control of the second thread, receive feedback information which is related to the I/O request and sent by the memory device, wherein the second thread is a receiving kernel thread of a kernel space.
A method of information processing for a host, comprising:
- binding a first thread to a first central processing unit (CPU) core included in the host, the first thread being a sending kernel thread of a kerel space;
- and
- binding a second thread to a second CPU core included in the host, the second thread being a receiving kernel thread of a kernel space,
- wherein when the first thread runs,
- controlling the first CPU core to determine a distribution channel from among a plurality of distribution channels of a doorbell register as unoccupied based an identification bit corresponding to the distribution channel having a first value;
- controlling the first CPU core to change the identification bit corresponding to the distribution channel from the first value to a second value to indicate the distribution channel is occupied;
- and
- controlling the first CPU core to send an input/output (I/O) request to a memory device coupled to the host via the distribution channel, and
- wherein when the second thread runs, controlling the second CPU core to receive feedback information which is related to the I/O request and sent by the memory device.
An electronic system, comprising:
- a host;
- and
- a memory device coupled to the host,
- wherein the host comprises:
- a processor configured to:
- bind a first thread to a first central processing unit (CPU) core included in the processor, wherein the first thread is a sending kernel thread of a kernel space;
- bind a second thread to a second CPU core included in the processor, wherein the second thread is a receiving kernel thread of a kernel space;
- and
- run the first thread, such that the first CPU core is controlled to determine a distribution channel from among a plurality of distribution channels of a doorbell register as unoccupied based an identification bit corresponding to the distribution channel having a first value, change the identification bit corresponding to the distribution channel from the first value to a second value to indicate the distribution channel is occupied, and send an input/output (I/O) request to a memory device coupled to the host via the distribution channel;
- and
- wherein the memory device is configured to:
- receive and process the I/O request;
- generate feedback information related to the I/O request;
- and
- send the feedback information to the host,
- wherein the processor is further configured to:
- run the second thread, such that the second CPU core is controlled to receive the feedback information sent by the memory device.
Dependencies are inferred from the claim text.