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US 12,639,219 B2Granted
Flexible configuration of memory module data width
AssigneeIntel Corporation
InventorsDuane E. Galbi, Kuljit S. Bains
Life of this patent
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Abstract
A memory system has a configurable mapping of address space of a memory array to address of a memory access command. In response to a memory access command, a memory device can apply a traditional mapping of the command address to the address space, or can apply an address remapping to remap the command address to different address space.
Claims20
A memory device, comprising:
- a configuration register to store one or more bits to indicate an address mapping for a memory array of the memory device, wherein the address mapping is to indicate a remapping of addresses of the memory array to an address higher than a maximum address range of the memory array;
- input/output (I/O) hardware to receive a memory access command with an address higher than the maximum address range of the memory array;
- and
- control circuitry to access a portion of the memory array in response to the memory access command, the portion of the memory array selected based on the remapping of addresses for the memory array, wherein the remapping of the addresses of the memory array is to indicate a remapping for row addresses higher than a maximum row address of the memory array.
1 more element
A computer system, comprising:
- multiple memory devices connected in parallel, the memory devices including respective configuration registers to store respective values to indicate an address mapping for memory arrays of the respective memory devices, wherein the address mapping is to indicate a remapping of addresses of the memory array to an address higher than a maximum address range of the memory array;
- memory controller including input/output (I/O) hardware to send a memory access command with an address to the memory devices, wherein the memory devices are to select a portion of the memory array to access in respective memory arrays based on the address and respective remappings of addresses for respective memory arrays, wherein the respective remappings of the addresses of the respective memory arrays is to indicate remapping for row address higher than a maximum row address of the respective memory array.
Dependencies are inferred from the claim text.