Partitioned cache for random read operations
AssigneeMicron Technology, Inc.
InventorDavid Aaron Palmer
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorDavid Aaron Palmer
Estimating the term…
Methods, systems, and devices for a partitioned cache for random read operations are described. Implementations may determine a target compression factor that is used during read operations. Larger compression factors may be associated with more frequent penalties, but may allow for a larger high-performance benchmark on a large address range. As described herein, a compression factor may indicate certain mappings that are stored to a volatile memory. The compression factor may be chosen at product design time or may be chosen dynamically at run time based on statistics such as extended cache hit or miss rate. If a read command associated with a logical block address not stored by the volatile memory is received, the memory system may “guess” the physical address by assuming that data was written to the memory system sequentially. If the data is correct, the data may be read out to the host system.
An apparatus, comprising:
A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:
A method, comprising:
Dependencies are inferred from the claim text.