Processing instructions at a processing unit configured to perform parallel processing
AssigneeImagination Technologies Limited
InventorsDaniel Wilkinson, Ian King
Life of this patent
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AssigneeImagination Technologies Limited
InventorsDaniel Wilkinson, Ian King
Estimating the term…
A method of processing instructions at a processing unit having a parallel processing engine. During a mission cycle, a first set of mission operand values is processed in accordance with a mission instruction at a first processing instance to generate a first mission output. In parallel, a second set of mission operand values is processed in accordance with the mission instruction at a second processing instance to generate a second mission output. During a test cycle, a first set of test operand values is processed in accordance with a test instruction at the first processing instance to generate a first test output, and in parallel, a second set of test operand values is processed in accordance with the test instruction at the second processing instance to generate a second test output, where the first set of test operand values is the same as the second set of test operand values. The first test output and the second test output are compared and a fault signal is raised if the compared test outputs do not match.
A method of processing instructions at a processing unit configured to perform parallel processing, the processing unit comprising a parallel processing engine, the parallel processing engine comprising a first processing instance and a second processing instance, the method comprising:
A processing unit configured to perform parallel processing, the processing unit comprising a parallel processing engine, the parallel processing engine comprising a first processing instance and a second processing instance, the parallel processing engine being configured to:
An integrated circuit manufacturing system comprising:
Dependencies are inferred from the claim text.