Managing current consumption in a machine learning accelerator

A machine learning accelerator (MLA) implemented on a semiconductor die, the MLA comprising:

• a plurality of interconnected compute elements configured to execute instructions according to a static schedule clocked by a clock, wherein the compute elements include monitor circuits that generate activity metrics for the compute elements based on instruction types of the instructions executed by the compute elements and the activity metrics are single-bit flags for different activity levels;
• aggregator logic coupled to the monitor circuits, wherein the aggregator logic receives the activity metrics and generates an aggregate activity metric from the received activity metrics;
• and
• a clock controller coupled to the aggregator logic, wherein the clock controller adjusts the clock based on the aggregate activity metric.

A method for adjusting a clock used to clock instructions executed by a plurality of interconnected compute elements according to a static schedule, the method comprising:

• generating activity metrics for the compute elements based on instruction types of the instructions executed by the compute elements, wherein the activity metrics are single-bit flags for different activity levels;
• generating an aggregate activity metric from the activity metrics for the compute elements;
• and
• adjusting the clock based on the aggregate activity metric.