Voltage reference circuit based on field effect transitors

An integrated circuit comprising:

• a first temperature-sensitive device configured to generate a first voltage which monotonically increases with an absolute temperature, wherein the first temperature-sensitive device has a first stacked gate device formed with a first group of field-effect transistors (FETs) stacked together and a second stacked gate device formed with a second group of FETs stacked together;
• a second temperature-sensitive device configured to generate a second voltage which monotonically decreases with the absolute temperature, wherein the second temperature-sensitive device has a third stacked gate device formed with a third group of FETs stacked together;
• and
• an output terminal configured to generate a reference voltage which is based on the first voltage from the first temperature-sensitive device and the second voltage from the second temperature-sensitive device;
• a first current source and a second current source;
• and
• a current path selector configured to connect the first current source to the first temperature-sensitive device and connect the second current source to the second temperature-sensitive device during a first time period and configured to connect the first current source to the second temperature-sensitive device and connect the second current source to the first temperature-sensitive device during a second time period.

An integrated circuit comprising:

• a first current source and a second current source;
• a current path selector having a first input connected to the first current source and having a second input connected to the second current source, wherein the current path selector also has a first output and a second output, wherein the current path selector is configured to connect the first input to the first output and connect the second input to the second output during a first time period and configured to connect the first input to the second output and connect the second input to the first output during a second time period;
• a first temperature-sensitive device having a first stacked gate device and a second stacked gate device, wherein the first stacked gate device has a first terminal thereof connected to the first output of the current path selector and has a stacked gate thereof connected to the first output of the current path selector, and wherein the second stacked gate device has a first terminal thereof connected to a second terminal of the first stacked gate device and has a stacked gate thereof connected to the first terminal of the first stacked gate device;
• a second temperature-sensitive device having a third stacked gate device, wherein the third stacked gate device has a first terminal thereof connected to the second output of the current path selector, has a stacked gate thereof connected to the second output of the current path selector, and has a second terminal thereof connected to the first terminal of the second stacked gate device;
• and
• wherein each of the first stacked gate device, the second stacked gate device, and the third stacked gate device is a stacked gate device formed with a group of FETs stacked together.