Display substrate, display panel and display apparatus

A display substrate, comprising:

• a first base substrate comprising a sealing region and a display port region arranged along a first direction, wherein at least one first connection region and at least one second connection region arranged on a side of the at least one first connection region away from the sealing region are in the display port region, the at least one second connection region and the at least one first connection region are arranged at intervals, at least one first overlapping region is formed between the at least one second connection region and the at least one first connection region, and each of the at least one first overlapping region is a region between one of the at least one first connection region and one of the at least one second connection region and overlapping with the first connection region and the second connection region in the first direction;
• a plurality of first connection terminals and a plurality of second connection terminals on the first base substrate, wherein the plurality of first connection terminals are in the at least one first connection region, and the plurality of second connection terminals are in the at least one second connection region;
• and
• a planarization layer on a side of the plurality of first connection terminals and the plurality of second connection terminals away from the first base substrate, wherein at least one first trench corresponding to the at least one first connection region and at least one second trench corresponding to the at least one second connection region are provided in the planarization layer;
• an orthographic projection of a bottom of each of the at least one first trench on the first base substrate covers a corresponding first connection region, an orthographic projection of a bottom of each of the at least one second trench on the first base substrate covers a corresponding second connection region;
• the planarization layer comprises:
• at least one first pattern corresponding to the at least one first overlapping region;
• an orthographic projection of the first pattern on the first base substrate overlaps with a corresponding first overlapping region, wherein a region where an orthographic projection of the planarization layer on the first base substrate is located is a second projection region;
• for any one of the plurality of first connection terminals, a minimum distance from the first connection terminal to the second projection region along the first direction is greater than or equal to 50 μm;
• for any one of the plurality of first connection terminals, a minimum distance from the first connection terminal to the second projection region along a second direction is greater than or equal to 1500 μm;
• for any one of the plurality of second connection terminals, a minimum distance from the second connection terminal to the second projection region along the first direction is greater than or equal to 50 μm;
• and
• for any one of the plurality of second connection terminals, a minimum distance from the second connection terminal to the second projection region along the second direction is greater than or equal to 1500 μm,
• wherein the second direction intersects the first direction.

A display substrate, comprising:

• a first base substrate comprising a sealing region and a display port region arranged along a first direction, wherein at least one first connection region and at least one second connection region arranged on a side of the at least one first connection region away from the sealing region are in the display port region, the at least one second connection region and the at least one first connection region are arranged at intervals, at least one first overlapping region is formed between the at least one second connection region and the at least one first connection region, and each of the at least one first overlapping region is a region between one of the at least one first connection region and one of the at least one second connection region and overlapping with the first connection region and the second connection region in the first direction;
• a plurality of first connection terminals and a plurality of second connection terminals on the first base substrate, wherein the plurality of first connection terminals are in the at least one first connection region, and the plurality of second connection terminals are in the at least one second connection region;
• and
• a planarization layer on a side of the plurality of first connection terminals and the plurality of second connection terminals away from the first base substrate, wherein at least one first trench corresponding to the at least one first connection region and at least one second trench corresponding to the at least one second connection region are provided in the planarization layer;
• an orthographic projection of a bottom of each of the at least one first trench on the first base substrate covers a corresponding first connection region, an orthographic projection of a bottom of each of the at least one second trench on the first base substrate covers a corresponding second connection region;
• the planarization layer comprises:
• at least one first pattern corresponding to the at least one first overlapping region;
• an orthographic projection of the first pattern on the first base substrate overlaps with a corresponding first overlapping region, wherein the first base substrate further comprises a second separation region;
• the second separation region and the sealing region are arranged in a second direction;
• the sealing region comprises:
• a display region and a non-display region surrounding the display region, the non-display region comprising:
• a functional region between the display region and the second separation region;
• the functional region comprises:
• a driving circuit arrangement region, a driving circuit clock signal trace arrangement region, and a display signal trace arrangement region, which are sequentially arranged away from the display region in the second direction;
• the driving circuit arrangement region is provided with a gate driving circuit therein, the driving circuit clock signal trace arrangement region is provided with a plurality of driving circuit clock signal traces therein, and the display signal trace arrangement region is provided with a display signal trace therein;
• the planarization layer is provided with a fourth trench corresponding to the second separation region therein, and an orthographic projection of the fourth trench on the first base substrate covers the second separation region;
• and
• a region where an orthographic projection of a bottom of the fourth trench on the first base substrate is located is a third orthographic projection region, and an edge of the third orthographic projection region close to the display region is between the driving circuit arrangement region and an edge of the display signal trace arrangement region close to the second separation region;
• wherein the second direction intersects the first direction.