Junction-isolated semiconductor strain gauge

An apparatus comprising:

• a silicon chip that includes a silicon substrate and a semiconductor strain gauge, the semiconductor strain gauge having a plurality of junction-isolated resistors, the plurality of resistors including a first resistor electrically connected between a first bond pad and a second bond pad;
• a second resistor electrically connected between the second bond pad and a third bond pad;
• a third resistor electrically connected between the third bond pad and a fourth bond pad;
• and
• a fourth resistor electrically connected between the fourth bond pad and the first bond pad;
• wherein the plurality of resistors are formed by locally doping the silicon substrate and biasing the silicon substrate such that the resistors are junction-isolated;
• wherein the first resistor is located on a top surface of the silicon chip between the first bond pad, the second bond pad, and the center of the top surface of the silicon chip;
• wherein the second resistor is located on the top surface of the silicon chip between the second bond pad, the third bond pad, and the center of the top surface of the silicon chip;
• wherein the third resistor is located on the top surface of the silicon chip between the third bond pad, the fourth bond pad, and the center of the top surface of the silicon chip;
• and
• wherein the fourth resistor is located on the top surface of the silicon chip between the fourth bond pad, the first bond pad, and the center of the top surface of the silicon chip.