Semiconductor device including interconnects with lower contact resistance

A semiconductor device comprising:

• a substrate;
• an interconnect layer disposed over the substrate, and including a metal line;
• a dielectric layer disposed over the interconnect layer;
• an etch stop layer disposed between the interconnect layer and the dielectric layer:
• a via contact disposed in a lower portion of the dielectric layer;
• a plurality of conductive lines disposed in an upper portion of the dielectric layer, the via contact electrically interconnecting the metal line and one of the conductive lines, the conductive lines extending in an along-line direction and being spaced apart from each other in a cross-line direction that is transverse to the along-line direction, the via contact having a dimension in the along-line direction greater than a dimension of the via contact in the cross-line direction;
• and
• another dielectric layer disposed on a lateral side of the via contact in the cross-line direction;
• wherein the via contact interfaces the dielectric layer in the along-line direction, and is spaced apart from the dielectric layer by the another dielectric layer in the cross-line direction, the another dielectric layer including a material different from a material of the dielectric layer, and
• wherein an interface between an upper portion of the via contact and the dielectric layer is misaligned with another interface between a lower portion of the via contact and the etch stop layer in the along-line direction.

A semiconductor device comprising:

• a metal line that is located on a lower plane and that extends in a cross-line direction;
• a conductive line that is located on an upper plane located over the lower plane and that extends in an along-line direction not parallel to the cross-line direction;
• a via contact that is located between the lower plane and the upper plane, and that electrically interconnects the metal line and the conductive line, a projection of the via contact from the upper plane onto the lower plane having a shape of an ellipse that has a major axis extending in the along-line direction and a minor axis extending in the cross-line direction;
• a dielectric layer that is located between the upper plane and the lower plane, and that surrounds the via contact;
• and
• another dielectric layer that is formed on sidewalls of the via contact in the cross-line direction and that is disposed between the via contact and the dielectric layer in the cross-line direction;
• wherein the via contact adjoins the dielectric layer in the along-line direction, and is spaced apart from the dielectric layer by the another dielectric layer in the cross-line direction,
• wherein a bottom surface of the another dielectric layer is higher than a bottom surface of the via contact.