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US 12,635,424 B2Granted
Quantum device
AssigneeNEC Corporation
InventorsKunihiko Ishihara, Suguru Watanabe, Katsumi Kikuchi
Life of this patent
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Abstract
A quantum device includes a quantum chip; an interposer flip chip mounting the quantum chip; and a socket including a housing has opening housing signal probe pins and ground probe pins. An inner wall of the opening housing the ground probe pin is covered with a metal layer, at least a part of the ground probe pin is thermally in contact with the metal layer of the inner wall which continues to a metal layer formed on at least a partial region of at least one of the first surface and the second surface of the housing.
Claims19
A quantum device comprising:
- a quantum chip including a superconducting quantum circuit;
- an interposer with a first surface on which the quantum chip is flip-chip mounted, the interposer including a plurality of through vias, each penetrating from the first surface to a second surface opposite of the first surface;
- and
- a socket that includes:
- a housing including a plurality of openings, each bored between a first surface of the housing faced to the second surface of the interposer and a second surface opposite of the first surface of the housing;
- and
- a plurality of probe pins respectively housed in the plurality of openings, each probe pin having a first end and a second end axially opposite of the first end respectively protruding from the first surface and the second surface of the housing, the plurality of probe pins including a plurality of signal probe pins and a plurality of ground probe pin,
- wherein at least one opening housing the ground probe pin, includes
- a first metal layer covering an inner wall of the at least one opening,
- at least a part of the ground probe pin housed in the at least one opening being thermally in contact with first the metal layer of the inner wall of the at least one opening,
- wherein the housing includes
- a second metal layer formed on at least a partial region of at least one of the first surface and the second surface thereof,
- wherein the first metal layer of the inner wall of the at least opening housing the ground probe pin, continues to the second metal layer formed on the at least the partial region of the at least one of the first surface and the second surface of the housing;
- wherein a part of the metal layer formed on the first surface of the housing is in contact with a sample stage;
- and
- wherein the sample stage includes:
- a first opening with a bottom, disposed on a surface of the sample stage;
- a second opening with a bottom, the second opening disposed on the bottom of the first opening;
- and
- a third opening disposed on the bottom of the second opening,
- wherein the quantum chip is housed in the third opening,
- the interposer is housed in the second opening,
- the socket is housed in the first opening,
- the board is disposed on the surface to cover the first opening.
21 more elements
Dependencies are inferred from the claim text.