Semiconductor device, equipment, and manufacturing method of semiconductor device

A semiconductor device comprising:

• a first semiconductor component including a first semiconductor substrate and a first wiring structure including at least one insulation layer stacked on the first semiconductor substrate, the first semiconductor component having a first surface located on a side of the first wiring structure that is opposite to the first semiconductor substrate;
• and
• a second semiconductor component including a second semiconductor substrate and a second wiring structure including at least one insulation layer stacked on the second semiconductor substrate, the second semiconductor component having a second surface located on a side of the second wiring structure opposite to the second semiconductor substrate, the first surface of the first semiconductor component and the second surface of the second semiconductor component being directly bonded together on a bonding surface of the first semiconductor component and the second semiconductor component,
• wherein the at least one insulation layer stacked on the first semiconductor substrate includes a first insulator portion on the first surface,
• wherein the at least one insulation layer stacked on the second semiconductor substrate includes a second insulator portion on the second surface,
• wherein the first insulator portion and the second insulator portion are directly bonded together on the bonding surface,
• wherein a region having an outer circumference obtained by projecting the whole first surface on a virtual plane parallel to the first surface in a normal direction of the virtual plane is a first region, a region having an outer circumference obtained by projecting the whole second surface on the virtual plane in the normal direction of the virtual plane is a second region, a region having an outer circumference obtained by projecting the whole first wiring structure on the virtual plane in the normal direction of the virtual plane is a third region, and a region having an outer circumference obtained by projecting the whole second wiring structure on the virtual plane in the normal direction of the virtual plane is a fourth region, and
• wherein an area of the first region is smaller than an area of the second region, the entire outer circumference of the first region is included in the second region, an area of the fourth region is smaller than an area of the third region, and the entire outer circumference of the fourth region is included in the third region.