Display substrate and manufacturing method thereof, and display device

A manufacturing method of a display substrate, comprising:

• providing a base substrate;
• forming a semiconductor material layer on the base substrate;
• forming a conductive material layer on a side of the semiconductor material layer away from the base substrate;
• and
• forming an etching mask on a side of the conductive material layer away from the semiconductor material layer,
• wherein the etching mask comprises a first mask portion, the first mask portion comprises a first sub-mask portion and a second sub-mask portion, the second sub-mask portion is on at least one side of the first sub-mask portion, and the second sub-mask portion is at an edge of the first mask portion, and a thickness of the first sub-mask portion is greater than that of the second sub-mask portion in a direction perpendicular to the base substrate,
• after the etching mask is formed, the manufacturing method further comprises:
• patterning the conductive material layer and the semiconductor material layer with the first mask portion as a mask to form a data line and a first semiconductor pattern between the data line and the base substrate, wherein the first semiconductor pattern comprises a first protrusion portion which is not covered by the data line and protrudes relative to an edge of the data line, the first protrusion portion is arranged at the edge of the data line, and a size of an interval between an edge of the first protrusion portion away from the data line and the edge of the data line is a first size;
• and the first size is greater than 0 and smaller than 3.0 microns,
• the etching mask further comprises a second mask portion, and the second mask portion comprises a third sub-mask portion located at an edge position, and a thickness of the third sub-mask portion is the same as the thickness of the first sub-mask portion in the direction perpendicular to the base substrate;
• after the etching mask is formed, the manufacturing method further comprises:
• patterning the conductive material layer and the semiconductor material layer with the second mask portion as a mask to form a first electrode and a second electrode of a transistor and a second semiconductor pattern located between the first electrode and the second electrode of the transistor and the base substrate, wherein the second semiconductor pattern comprises a channel region and a doped region pattern of the transistor, and a protrusion portion of an edge of the second semiconductor pattern protruding relative to an edge of the first electrode is a second protrusion portion, the first electrode and the second electrode are both electrically connected with the doped region pattern, the first electrode is electrically connected with the data line, and a size of an interval between an edge of the second protrusion portion away from the first electrode and the edge of the first electrode is a second size, and the second size is greater than the first size.