Semiconductor device including memory structure arranged adjacent to planar gate structure

A semiconductor device, comprising:

• a semiconductor layer having a main surface;
• a well region having a first conduction type and formed on a surface portion of the main surface of the semiconductor layer;
• a first region having a second conduction type and formed on a surface portion of the well region;
• a second region having the second conduction type and formed on the surface portion of the well region at an interval from the first region;
• a diffusion layer having the first conduction type and formed on the surface portion of the main surface adjacent to the first region;
• a planar gate structure formed on the main surface of the semiconductor layer to face a channel region having the first conduction type and between the first region and the second region;
• and
• a memory structure including a charge storage film arranged adjacent to a lateral side of the planar gate structure on a side of the first region,
• wherein the planar gate structure includes:
• a gate electrode;
• and
• a gate insulating film formed between the main surface of the semiconductor layer and a bottom surface of the gate electrode, and
• wherein the diffusion layer and the gate insulating film include a partially overlapping region in a plan view.