Power semiconductor device and methods of producing a power semiconductor device

A method of producing a semiconductor device, the method comprising:

• implanting a dopant species of a first impurity type into a surface of a silicon layer of a silicon-on-insulator (SOI) substrate to define a drift region for a plurality of transistor cells;
• forming a gate structure for each transistor cell and that comprises a gate electrode separated from the silicon layer by a gate dielectric having a thickness in a range of 20 nm to 60 nm;
• after defining the drift region, implanting a dopant species of a second impurity type opposite the first impurity type into the surface of the silicon layer and at an angle relative to the surface to define a body region which extends under part of the gate structure for each transistor cell;
• after implanting the dopant species of the second impurity type, annealing the SOI substrate at a temperature of at least 900° C. for more than 1 minute;
• implanting a dopant species of the first impurity type into the surface of the silicon layer to define, for each transistor cell, a source region adjacent the body region and a drain region laterally separated from the body region by the drift region;
• and
• electrically coupling the transistor cells in parallel to form a power transistor,
• wherein an effective channel length for each transistor cell is in a range of 50 nm to 500 nm,
• wherein the power transistor has a maximum rated voltage in a range of 5V to 60V.